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    <title>topic Re: i.MX93 BBNSM GPR registers in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX93-BBNSM-GPR-registers/m-p/2295674#M243455</link>
    <description>&lt;P&gt;I.MX93 design is different from imx95, refer to the SRM of imx93,&amp;nbsp;ELE owns the Battery-Backed Non Secure Module (BBNSM). To access BBNSM, the boot management core must use the&lt;BR /&gt;message interface to set and query parameters. and you also can refer to the imx93 SDK, in the MIMX9352_cm33.h， you can find the BBNSM the register layout, GPR is in the structure&lt;/P&gt;</description>
    <pubDate>Mon, 19 Jan 2026 06:31:03 GMT</pubDate>
    <dc:creator>joanxie</dc:creator>
    <dc:date>2026-01-19T06:31:03Z</dc:date>
    <item>
      <title>i.MX93 BBNSM GPR registers</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX93-BBNSM-GPR-registers/m-p/2294604#M243435</link>
      <description>&lt;P&gt;The reference manual for the i.MX93 says that "it is up to the ELKe firmware" to decide how the BBNSM GPR registers are used. The same phrase is found in the i.MX8ULP reference manual and with that chip ELke was the name of the edge lock enclave firmware.&lt;/P&gt;&lt;P&gt;Does the ELE firmware on the i.MX93 use the BBNSM GPR registers or can you confirm that they are completely unused? I see that half of these registers are used by the SCMI firmware for the i.MX94/95, but there is no SCMI on the i.MX93.&lt;/P&gt;</description>
      <pubDate>Fri, 16 Jan 2026 00:49:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX93-BBNSM-GPR-registers/m-p/2294604#M243435</guid>
      <dc:creator>danielgloeckner</dc:creator>
      <dc:date>2026-01-16T00:49:52Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX93 BBNSM GPR registers</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX93-BBNSM-GPR-registers/m-p/2295674#M243455</link>
      <description>&lt;P&gt;I.MX93 design is different from imx95, refer to the SRM of imx93,&amp;nbsp;ELE owns the Battery-Backed Non Secure Module (BBNSM). To access BBNSM, the boot management core must use the&lt;BR /&gt;message interface to set and query parameters. and you also can refer to the imx93 SDK, in the MIMX9352_cm33.h， you can find the BBNSM the register layout, GPR is in the structure&lt;/P&gt;</description>
      <pubDate>Mon, 19 Jan 2026 06:31:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX93-BBNSM-GPR-registers/m-p/2295674#M243455</guid>
      <dc:creator>joanxie</dc:creator>
      <dc:date>2026-01-19T06:31:03Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX93 BBNSM GPR registers</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX93-BBNSM-GPR-registers/m-p/2295999#M243461</link>
      <description>&lt;P&gt;To me none of the messages in the IMX93ELEAPI&amp;nbsp;Edgelock Secure Enclave (ELE) API Reference Guide Rev. 2 look like they have anything to do with the BBNSM GPR registers. Can you tell me which message it is (or on which page to look if the message name is confidential)?&lt;/P&gt;&lt;P&gt;If the BBNSM is owned by the ELE, why is the TRDC not configured to prevent access from the ARM cores? I can set the GPR registers from Linux and the values persist across reboots.&lt;/P&gt;</description>
      <pubDate>Mon, 19 Jan 2026 12:33:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX93-BBNSM-GPR-registers/m-p/2295999#M243461</guid>
      <dc:creator>danielgloeckner</dc:creator>
      <dc:date>2026-01-19T12:33:52Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX93 BBNSM GPR registers</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX93-BBNSM-GPR-registers/m-p/2296373#M243473</link>
      <description>&lt;P&gt;my understanding is that this FW define the gpr register&amp;nbsp; layout, not mean that only ELE can use these registers, in fact, A core and M core can access these register directly&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 20 Jan 2026 07:26:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX93-BBNSM-GPR-registers/m-p/2296373#M243473</guid>
      <dc:creator>joanxie</dc:creator>
      <dc:date>2026-01-20T07:26:40Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX93 BBNSM GPR registers</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX93-BBNSM-GPR-registers/m-p/2296520#M243478</link>
      <description>&lt;P&gt;But I can't find any usage layout in the documentation or the header files of MCUXpresso. They all just say there are 8 registers at offset 0x300, but they don't say which ones are reserved for the ELE and which ones are free to use.&lt;/P&gt;</description>
      <pubDate>Tue, 20 Jan 2026 10:07:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX93-BBNSM-GPR-registers/m-p/2296520#M243478</guid>
      <dc:creator>danielgloeckner</dc:creator>
      <dc:date>2026-01-20T10:07:26Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX93 BBNSM GPR registers</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX93-BBNSM-GPR-registers/m-p/2300982#M243637</link>
      <description>&lt;P&gt;confirmed from secure team again, ELE FW doesn't use BBNSM GPR register and I checked the imx93 SRM version 5.0 removed "ELE owns the Battery-Backed Non Secure Module (BBNSM)." which is mentioned in the rev 4.0&lt;/P&gt;</description>
      <pubDate>Tue, 27 Jan 2026 08:14:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX93-BBNSM-GPR-registers/m-p/2300982#M243637</guid>
      <dc:creator>joanxie</dc:creator>
      <dc:date>2026-01-27T08:14:19Z</dc:date>
    </item>
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