IMX8MP LPDDR design configuration

pratham_malaviya — Fri, 02 Jan 2026 08:11:50 GMT

Hi,

We are using multiple LPDDR4 part numbers in one of our designs. These parts have different configurations in terms of channel, rank, and density, but we plan to use the same hardware design for all of them.

Below are the parts and their configurations for reference. The parts MT53E1G32D2FW and MT53E2G32D4DE are already working correctly on our board.

Part	Density	Channel	Rank
D1611PM3BDGUI	16Gb	1	1
H9HCNNNBKUMLXR-NEE	16Gb	2	1
B3221PM3BDGUI	32Gb	2	1
MT53E1G32D2FW-046 WT:B	32Gb	2	2
Q6422PM3BDGVK	64Gb	2	2
MT53E2G32D4DE-046 WT:C	64Gb	2	2

Our hardware design is common for all the above parts and is based on the i.MX8MP LPDDR4 EVK reference design.

We have the following questions:

1. Since two parts are already working, can we use the same lpddr_timing.c file for the other 32Gb and 64Gb parts, even if their channel or rank configuration is different? Or is separate calibration required?

2. Do we need to make changes in our design for single channel 16Gb part?

Best Regards,

Pratham

Re: IMX8MP LPDDR design configuration

Manuel_Salas — Mon, 12 Jan 2026 21:21:18 GMT

Hello @pratham_malaviya

I hope you are doing very well!

Answering your questions:

1. No. It is highly recommended to make the calibration for each PN.

2. No schematic change is required for the single‑channel variant.

Best regards,

Salas.

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IMX8MP LPDDR design configuration

Re: IMX8MP LPDDR design configuration