https://community.nxp.com/t5/i-MX-Processors/Using-Tamper-Pin-on-i-MX7ULP/m-p/2260228#M242830 <P>I’ve enabled SECVIO in the kernel to handle tamper events using the tamper pin on the i.MX7ULP.<BR />Do I also need to modify anything in the device tree (DTS) or in U-Boot for proper tamper pin configuration and detection?<BR />Additionally, is there any accessible example or application demonstrating how to use the tamper handler in userspace?</P> Thu, 11 Dec 2025 12:27:09 GMT stl123 2025-12-11T12:27:09Z https://community.nxp.com/t5/i-MX-Processors/Using-Tamper-Pin-on-i-MX7ULP/m-p/2260228#M242830 <P>I’ve enabled SECVIO in the kernel to handle tamper events using the tamper pin on the i.MX7ULP.<BR />Do I also need to modify anything in the device tree (DTS) or in U-Boot for proper tamper pin configuration and detection?<BR />Additionally, is there any accessible example or application demonstrating how to use the tamper handler in userspace?</P> Thu, 11 Dec 2025 12:27:09 GMT https://community.nxp.com/t5/i-MX-Processors/Using-Tamper-Pin-on-i-MX7ULP/m-p/2260228#M242830 stl123 2025-12-11T12:27:09Z https://community.nxp.com/t5/i-MX-Processors/Using-Tamper-Pin-on-i-MX7ULP/m-p/2261300#M242856 <P>Hello,</P> <P><SPAN>For proper tamper pin configuration and detection on the i.MX7ULP:<BR /><BR />1. Device Tree Configuration:<BR />You don't necessarily need to modify the device tree (DTS) specifically for tamper functionality when SECVIO is already enabled in the kernel. The tamper pins are typically handled by the SNVS (Secure Non-Volatile Storage) module and its driver rather than through standard GPIO configurations in the device tree.<BR /><BR />2. U-Boot Configuration:<BR />If you're planning to use tamper detection in U-Boot as well, you would need to add "CONFIG_IMX_TAMPER=y" to your U-Boot defconfig and rebuild it. This enables the tamper detection functionality in the bootloader.<BR /><BR />3. Tamper Handler in Userspace:<BR />For userspace applications, there isn't a standardized example application specifically for i.MX7ULP. However, you can adapt implementations from similar platforms like i.MX6UL or i.MX7D as the tampering mechanism is fundamentally similar across these platforms.<BR /><BR />For implementation guidance, refer to:<BR />- Section 3.1.4.2 (Tamper Detection) in the i.MX7 Reference Manual<BR />- Application note "Tampering Application for i.MX7Dsabresd" (AN12210.pdf)<BR /><BR />The SECVIO driver in the kernel should handle the tamper events and can be configured to trigger appropriate security measures when tampering is detected. You can monitor these events through the SNVS_LP Status Register (LPSR) and manage them through the SNVS_LP Tamper Detectors Configuration Register (LPTDCR).</SPAN></P> <P><SPAN>Regards</SPAN></P> Fri, 12 Dec 2025 14:12:01 GMT https://community.nxp.com/t5/i-MX-Processors/Using-Tamper-Pin-on-i-MX7ULP/m-p/2261300#M242856 Bio_TICFSL 2025-12-12T14:12:01Z