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    <title>i.MX ProcessorsのトピックRe: IMX8MP RGMII Connection with No PHY</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-RGMII-Connection-with-No-PHY/m-p/2255426#M242653</link>
    <description>&lt;P&gt;Thank you for your reply, I have looked at that document already which helped me get this far. However, I still need further assistance in getting things working.&lt;/P&gt;</description>
    <pubDate>Thu, 04 Dec 2025 15:55:32 GMT</pubDate>
    <dc:creator>RyanMKB</dc:creator>
    <dc:date>2025-12-04T15:55:32Z</dc:date>
    <item>
      <title>IMX8MP RGMII Connection with No PHY</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-RGMII-Connection-with-No-PHY/m-p/2254641#M242618</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I'm trying to setup an ethernet RGMII connection to a switch without using a PHY. Based on other posts I've configured my device tree as follows:&lt;/P&gt;&lt;LI-CODE lang="c"&gt;&amp;amp;fec {
	pinctrl-names = "default";
	pinctrl-0 = &amp;lt;&amp;amp;pinctrl_fec&amp;gt;, &amp;lt;&amp;amp;pinctrl_fec_phy&amp;gt;;
	phy-mode = "rgmii";
	status = "okay";

	fixed-link {
		speed = &amp;lt;1000&amp;gt;;
		full-duplex;
	};

};

	pinctrl_fec: fecgrp {
		fsl,pins = &amp;lt;MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC		0x40000044&amp;gt;,
			   &amp;lt;MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO		0x40000044&amp;gt;,
			   &amp;lt;MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0	0x90&amp;gt;,
			   &amp;lt;MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1	0x90&amp;gt;,
			   &amp;lt;MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2	0x90&amp;gt;,
			   &amp;lt;MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3	0x90&amp;gt;,
			   &amp;lt;MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC	0x90&amp;gt;,
			   &amp;lt;MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL	0x90&amp;gt;,
			   &amp;lt;MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0	0x12&amp;gt;,
			   &amp;lt;MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1	0x12&amp;gt;,
			   &amp;lt;MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2	0x12&amp;gt;,
			   &amp;lt;MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3	0x12&amp;gt;,
			   &amp;lt;MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL	0x12&amp;gt;,
			   &amp;lt;MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC	0x14&amp;gt;;
	};

	pinctrl_fec_phy: fecphygrp {
		fsl,pins = &amp;lt;MX8MP_IOMUXC_SAI1_RXFS__GPIO4_IO00		0x100&amp;gt;,
			   &amp;lt;MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01		0x1c0&amp;gt;;
	};&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;ethtool shows Link detected: yes, and ifconfig shows that an ip address was assigned. However I am unable to ping to or from the board. Can you confirm if the pins are set correctly for this use case? Thanks.&lt;/P&gt;</description>
      <pubDate>Wed, 03 Dec 2025 23:24:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-RGMII-Connection-with-No-PHY/m-p/2254641#M242618</guid>
      <dc:creator>RyanMKB</dc:creator>
      <dc:date>2025-12-03T23:24:46Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8MP RGMII Connection with No PHY</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-RGMII-Connection-with-No-PHY/m-p/2255221#M242636</link>
      <description>&lt;P&gt;pls refer to the enclosed file, which is very useful for your case&lt;/P&gt;</description>
      <pubDate>Thu, 04 Dec 2025 10:36:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-RGMII-Connection-with-No-PHY/m-p/2255221#M242636</guid>
      <dc:creator>joanxie</dc:creator>
      <dc:date>2025-12-04T10:36:38Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8MP RGMII Connection with No PHY</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-RGMII-Connection-with-No-PHY/m-p/2255426#M242653</link>
      <description>&lt;P&gt;Thank you for your reply, I have looked at that document already which helped me get this far. However, I still need further assistance in getting things working.&lt;/P&gt;</description>
      <pubDate>Thu, 04 Dec 2025 15:55:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-RGMII-Connection-with-No-PHY/m-p/2255426#M242653</guid>
      <dc:creator>RyanMKB</dc:creator>
      <dc:date>2025-12-04T15:55:32Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8MP RGMII Connection with No PHY</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-RGMII-Connection-with-No-PHY/m-p/2256381#M242694</link>
      <description>&lt;P&gt;for RGMII, the current bsp supports this as default, you can refer to that&lt;/P&gt;
&lt;P&gt;&lt;A href="https://github.com/nxp-imx/linux-imx/blob/lf-6.12.y/arch/arm64/boot/dts/freescale/imx8mp-evk.dts#L390" target="_blank"&gt;https://github.com/nxp-imx/linux-imx/blob/lf-6.12.y/arch/arm64/boot/dts/freescale/imx8mp-evk.dts#L390&lt;/A&gt;&lt;/P&gt;</description>
      <pubDate>Sat, 06 Dec 2025 06:50:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-RGMII-Connection-with-No-PHY/m-p/2256381#M242694</guid>
      <dc:creator>joanxie</dc:creator>
      <dc:date>2025-12-06T06:50:49Z</dc:date>
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