topic Re: i.MX8M Boot Sequence in i.MX Processors

i.MX8M Boot Sequence

shwetha_nayak — Fri, 30 Nov 2018 06:53:40 GMT

Hi,

I am working on i.MX8MQ EVK. I want to know the boot flow sequence of i.MX8MQ like

Where and who loads SPL and AFT images?
How the communication takes place between the SPL, ATF and the Uboot?
What are those Training test that are running on power on in SPL?
What does the file ddr_init.c and ddrphy_train.c do?(The file got after the DDR calibration)

Reagrds,

Shwetha

Yuri — Mon, 03 Dec 2018 06:22:48 GMT

Hello,

Please use the following resources:

1) section 6.1 (System Boot) of the i.MX8M Reference Manual.

2) app note AN12212 (Software Solutions for Migration Guide from Aarch32 to Aarch64)

3) i.MX Linux® User's Guide, Rev. L4.14.62_1.0.0_beta.

Have a great day,

Yuri

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abtom87 — Sat, 29 Nov 2025 16:14:36 GMT

@Yuri Those URLS are invalid. Could you perhaps update those URLs?