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    <title>i.MX ProcessorsのトピックRe: imx91: Using 768MBit LPDDR4 partially</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/imx91-Using-768MBit-LPDDR4-partially/m-p/2250574#M242469</link>
    <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;You should have a separate u-boot.imx for each board with different DDR size.&lt;/P&gt;
&lt;P&gt;Best regards.&lt;/P&gt;</description>
    <pubDate>Thu, 27 Nov 2025 17:52:46 GMT</pubDate>
    <dc:creator>JorgeCas</dc:creator>
    <dc:date>2025-11-27T17:52:46Z</dc:date>
    <item>
      <title>imx91: Using 768MBit LPDDR4 partially</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx91-Using-768MBit-LPDDR4-partially/m-p/2250419#M242462</link>
      <description>&lt;P&gt;Hello there,&lt;/P&gt;&lt;P&gt;I'm trying to get u-boot(-imx) running on my imx91 custom board. My requirement is to support different ram sizes, use the first 512 MiB and ignore the rest. I created a 512 MiB lpddr4 timing file and set 0x20000000 as the size, which is working fine.&lt;/P&gt;&lt;P&gt;When try to boot the same flash.bin file on a board with 768 MiB (12 Gbit) DDR, it does not boot past the SPL:&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;U-Boot SPL 2025.04-g56fb301b0da9-dirty (Nov 27 2025 - 13:04:08 +0100)
SOC: 0xa0009100
LC: 0x2040010
DDR: 1600MTS
ddr_init succeeded // custom print by me
Normal Boot
Trying to boot from BOOTROM
Boot Stage: USB boot
Find img info 0x88000000, size 416
Download 1661952, Total size 1662976&lt;/LI-CODE&gt;&lt;P&gt;&lt;BR /&gt;On the board with 512 MiB, the boot continues with&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;NOTICE:  TRDC init done
NOTICE:  BL31: v2.10.0	(release):automotive-15.0.0_1.3.0
NOTICE:  BL31: Built : 12:42:08, Sep  3 2025


U-Boot 2025.04-g56fb301b0da9-dirty (Nov 27 2025 - 11:44:55 +0100)

Reset Status: POR&lt;/LI-CODE&gt;&lt;P&gt;Which made me think that imx-atf somehow does not accept the 768 MiB. What do you think? Do you have any idea how to debug this?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 27 Nov 2025 12:47:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx91-Using-768MBit-LPDDR4-partially/m-p/2250419#M242462</guid>
      <dc:creator>stoejs</dc:creator>
      <dc:date>2025-11-27T12:47:25Z</dc:date>
    </item>
    <item>
      <title>Re: imx91: Using 768MBit LPDDR4 partially</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx91-Using-768MBit-LPDDR4-partially/m-p/2250574#M242469</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;You should have a separate u-boot.imx for each board with different DDR size.&lt;/P&gt;
&lt;P&gt;Best regards.&lt;/P&gt;</description>
      <pubDate>Thu, 27 Nov 2025 17:52:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx91-Using-768MBit-LPDDR4-partially/m-p/2250574#M242469</guid>
      <dc:creator>JorgeCas</dc:creator>
      <dc:date>2025-11-27T17:52:46Z</dc:date>
    </item>
    <item>
      <title>Re: imx91: Using 768MBit LPDDR4 partially</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx91-Using-768MBit-LPDDR4-partially/m-p/2255401#M242648</link>
      <description>&lt;P&gt;Turns out, the nxp ddr tool only gets imx91 1.5Gb support in the next release, scheduled for 2025-12-25.&lt;/P&gt;&lt;P&gt;I created a timings file with 12Gbit density using the imx93 processor, edited the MTS and it runs with both the 512 MB and 768 MB DDR, assuming you'll only ever need 512 MB.&lt;/P&gt;</description>
      <pubDate>Thu, 04 Dec 2025 15:17:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx91-Using-768MBit-LPDDR4-partially/m-p/2255401#M242648</guid>
      <dc:creator>stoejs</dc:creator>
      <dc:date>2025-12-04T15:17:43Z</dc:date>
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