i.MX ProcessorsのトピックRe: booting i.mx8mplus

booting i.mx8mplus

Bhardwaj — Wed, 08 Oct 2025 17:40:36 GMT

we have an custom board having spi flash and usb. In custom board usb has 5v, gnd , usb_dm_con and usb_dp_con pins. This pins are given out for usb type B for loading the files into spi flash using uuu tool through usb. we have given the connections as mentioned below:

-> we changed the boot mode to usb serial downloader.

-> After power on we have connected the type B cable to board and other end to PC but usb is not detecting .

Questions:

1. Is this correct way to do for usb1 in custom board when compared to EVK-i.mx8mplus ?

2. Any alternate solution for booting the custom board for this kind of connections?

3. if this is not correct what is the correct way to boot the board?

Re: booting i.mx8mplus

JosephAtNXP — Wed, 08 Oct 2025 18:32:15 GMT

Hi,

Thank you for your interest in NXP Semiconductor products,

How is ID pin from micro B connector handled? Could you try pulling it down?

Have you tried with other hosts and other cable?

Please disconnect F12 ball resistor.

Regards

Re: booting i.mx8mplus

Bhardwaj — Thu, 09 Oct 2025 11:19:59 GMT

Hi,

we removed F12 ball resistor as you said and ID pin from micro B connector is pulled down,

but USB is not detecting

1.can we flash through USB micro B ?

Re: booting i.mx8mplus

JosephAtNXP — Fri, 10 Oct 2025 21:53:01 GMT

Hi @Bhardwaj,

It should be possible, please share your board schematics, if you want to share it privately, you can create a technical ticket.

Regards

Re: booting i.mx8mplus

Bhardwaj — Thu, 13 Nov 2025 14:07:44 GMT

Hi @JosephAtNXP ,

1. On the i.MX8M Plus EVK, LPDDR4 memory is used. However, on our custom board, we are using DDR4 memory (Part No: MT40A1G16RC-062EIT:B).

2. we had build U-Boot in standalone environment by seeing I.MX porting guide,and followed the below procedure mentioned.

https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/Manually-build-Boot-binary-for-i-MX8M-Mi...

3. whenever we tried to boot from fspi ,we are facing the below mention error.

4. we also download the ddr_timing.c from DDR TOOL.

5. While generating images for the i.MX8M Plus LPDDR4 EVK using the Yocto BSP, we are able to successfully generate SD card, F SPI, and boot binary images.
However, when we try to generate images for the i.MX8M Plus DDR4 configuration, it fails to generate the F SPI images and shows an error indicating that only SD and NAND are supported.

can you please guide us regarding this DDR4.

Re: booting i.mx8mplus

JosephAtNXP — Tue, 18 Nov 2025 18:30:31 GMT

Hi,

For Yocto fail, it's hard to tell since the recipe should be independent to DDR configuration; it should be ported and integrated to yocto, as you are trying standalone, let's stick to it.

For DDR4 porting, did you create an RPA porting? I would strongly suggest creating one and validating DDR4 access and tests with DDR tool, to confirm that your timing file is correct.

If you are building imx-boot (u-boot) firmware in standalone as said in the post, I recommend double checking that imx-firmware's ddr4 training binaries are copied and not lpddr4.

Regards

Re: booting i.mx8mplus

NXP_USER_05 — Fri, 21 Nov 2025 06:32:10 GMT

Hi @JosephAtNXP ,

On the i.MX8M Plus EVK, LPDDR4 memory is used. However, on our custom board, we are using DDR4 memory (Part No: MT40A1G16RC-062EIT:B)

These are the boot prints booting from flexspi.

20-11-2025 19:21:50.120 [RX] - <NUL><CR><LF>
U-Boot SPL 2025.04-g44898b9f3cfe-dirty (Nov 20 2025 - 18:39:51 +0530)<CR><LF>
DDRINFO: start DRAM init<CR><LF>
DDRINFO: cfg clk<CR><LF>
DDRINFO: DRAM rate 3200MTS<CR><LF>
DDRINFO: ddrc config start<CR><LF>
DDRINFO: ddrc config done<CR><LF>
DDRINFO:ddrphy config start<CR><LF>
PHY init... configuration cmplted<CR><LF>
DRAM PHY training for 3200MTS<CR><LF>
<NUL><NUL><CR><LF>
U-Boot SPL 2025.04-g44898b9f3cfe-dirty (Nov 20 2025 - 18:39:51 +0530)<CR><LF>
DDRINFO: start DRAM init<CR><LF>
DDRINFO: cfg clk<CR><LF>
DDRINFO: DRAM rate 3200MTS<CR><LF>
DDRINFO: ddrc config start<CR><LF>
DDRINFO: ddrc config done<CR><LF>
DDRINFO:ddrphy config start<CR><LF>
PHY init... configuration cmplted<CR><LF>
DRAM PHY training for 3200MTS<CR><LF>
[PMU Major message = 0x00000000]<CR><LF>
[PMU Major message = 0x00000002]<CR><LF>
[PMU Major message = 0x00000001]<CR><LF>
[PMU Major message = 0x0000000a]<CR><LF>
[PMU Major message = 0x000000fd]<CR><LF>
[PMU Major message = 0x000000fe]<CR><LF>
[PMU Major message = 0x00000008]<CR><LF>
PMU String index = 0x001c0003<CR><LF>
arg[0] = 0x00000002<CR><LF>
arg[1] = 0x00000002<CR><LF>
arg[2] = 0x00000004<CR><LF>
[PMU Major message = 0x00000008]<CR><LF>
PMU String index = 0x04020000<CR><LF>
[PMU Major message = 0x000000ff]<CR><LF>
Training FAILED<CR><LF>

Also Using the RPA file for DDR4(I.MX8MPLUS).

can you please suggest any ideas to go forward.

thank you.

Re: booting i.mx8mplus

JosephAtNXP — Tue, 25 Nov 2025 20:50:16 GMT

Hi @NXP_USER_05,

For your setup, using DDR4 RPA is advised, I recommend reviewing the RPA configuration with DDR Tool tests, when the correct RPA passes, make sure to include DDR4 binaries in your image making and the correct timing file, this way you test the image in the last step.

Regards!