topic Re: how to disable selfref on IMX8MP? in i.MX Processors

how to disable selfref on IMX8MP?

jekim — Wed, 05 Nov 2025 07:30:06 GMT

Hello,

The default value of the PWRCTL register(0x3d400030) was 0x1. It was changed to 0x0 to disable selfref. The reference manual explained selfref_en that If true then the DDRC puts the SDRAM into Self Refresh after a programmable number of cycles "maximum idle clocks before Self Refresh (PWRTMG.selfref_to_x32)". This register bit may be reprogrammed during the course of normal operation. Self refresh events were still found with the selfref_en value 0x0. How to prevent reprogramming of this parameter?

Thanks.

Re: how to disable selfref on IMX8MP?

pengyong_zhang — Thu, 06 Nov 2025 01:16:16 GMT

Hi @jekim

we do not support disabled the DRAM self-refresh feature. and why are you want to disable it? disabled it will causa date loss.

B.R

Re: how to disable selfref on IMX8MP?

jekim — Thu, 06 Nov 2025 07:28:35 GMT

Hi @pengyong_zhang ,

In failure analysis, enabling and disabling some features are often required.

Without self refresh, auto-refresh at tREFI period still can protect RAM data.

Self refresh is not an inevitable mode for RAM operation.

Thanks.

Re: how to disable selfref on IMX8MP?

pengyong_zhang — Fri, 07 Nov 2025 05:23:27 GMT

hI @jekim

self refresh is DRAM itself feature in low power mode. And you said auto-refresh is DDRC site feature at DRAM normal mode. Both of refresh features are aim to protect the data. We do not support disabled the self refresh.

B.R