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    <title>topic Re: imx8mp-WOL in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/imx8mp-WOL/m-p/2190904#M241577</link>
    <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;Make sure that phy0 is the one as you can check the RGMII as phymode t&lt;SPAN class="T286Pc" data-sfc-cp="" data-processed="true"&gt;he Ethernet MAC controller node to which the PHY is connected. The &lt;CODE class="o8j0Mc" dir="ltr" data-processed="true"&gt;phy-handle&lt;/CODE&gt; property links the controller to its corresponding PHY node.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN class="T286Pc" data-sfc-cp="" data-processed="true"&gt;Regards&lt;/SPAN&gt;&lt;/P&gt;</description>
    <pubDate>Wed, 22 Oct 2025 16:43:51 GMT</pubDate>
    <dc:creator>Bio_TICFSL</dc:creator>
    <dc:date>2025-10-22T16:43:51Z</dc:date>
    <item>
      <title>imx8mp-WOL</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8mp-WOL/m-p/2190782#M241573</link>
      <description>&lt;P&gt;Hi Nxp,&lt;/P&gt;&lt;P&gt;We are using imx8mp based SOC.&lt;/P&gt;&lt;P&gt;our BSP is based on&amp;nbsp;&lt;SPAN&gt;kirkstone branch.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;We have ethernet connected to eqos -&amp;gt; dp83867 &amp;amp; ethenet is functional.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;WOL functionality is wokring fine. we are able to resume from suspend&amp;nbsp;&lt;BR /&gt;&lt;BR /&gt;imx8mp :&lt;BR /&gt;#&amp;nbsp;ethtool -s eth1 wol g&lt;BR /&gt;#systemctl suspend&lt;BR /&gt;&lt;BR /&gt;from any other machine in LAN we are able to trigger WOL packet&lt;BR /&gt;#wakeonlan &amp;lt;ethernet mac address &amp;gt;&lt;BR /&gt;&lt;BR /&gt;after resuming from suspend ethernet was not functional found IP was not assiged to the phy.&lt;BR /&gt;&lt;BR /&gt;DTS:&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;DIV&gt;&amp;amp;eqos {&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;pinctrl-names = "default";&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;pinctrl-0 = &amp;lt;&amp;amp;pinctrl_eqos&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;phy-mode = "rgmii-id";&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;phy-handle = &amp;lt;&amp;amp;dp83867_1&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;snps,force_thresh_dma_mode;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;snps,mtl-tx-config = &amp;lt;&amp;amp;mtl_tx_setup&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;snps,mtl-rx-config = &amp;lt;&amp;amp;mtl_rx_setup&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;status = "okay";&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;mdio {&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;compatible = "snps,dwmac-mdio";&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;#address-cells = &amp;lt;1&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;#size-cells = &amp;lt;0&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;/* TODO : RESET needed&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;* TODO : IRQ&amp;nbsp; &amp;nbsp;needed&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;*/&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;dp83867_1: ethernet-phy@0 {&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;/* RGMII-1 */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;compatible = "ethernet-phy-id2000.a231";&amp;nbsp;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;reg = &amp;lt;0&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;ti,rx-internal-delay = &amp;lt;DP83867_RGMIIDCTL_1_75_NS&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;ti,tx-internal-delay = &amp;lt;DP83867_RGMIIDCTL_1_75_NS&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;ti,fifo-depth = &amp;lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;ti,min-output-impedance;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;ti,dp83867-rxctrl-strap-quirk;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;interrupt-parent = &amp;lt;&amp;amp;gpio4&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;interrupts = &amp;lt;21 IRQ_TYPE_EDGE_FALLING&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;reset-gpio = &amp;lt;&amp;amp;gpio4 22 GPIO_ACTIVE_LOW&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;reset-assert-us = &amp;lt;10000&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;reset-deassert-us = &amp;lt;80000&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;};&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;};&lt;BR /&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;SPAN&gt;After resuming from wake on lan IP is not assigned to phy.&lt;BR /&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;Attached log for refernce.&lt;BR /&gt;&lt;BR /&gt;&lt;LI-PRODUCT title="IMX8MPLUS" id="IMX8MPLUS"&gt;&lt;/LI-PRODUCT&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/DIV&gt;</description>
      <pubDate>Wed, 22 Oct 2025 12:30:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8mp-WOL/m-p/2190782#M241573</guid>
      <dc:creator>shivashanka141</dc:creator>
      <dc:date>2025-10-22T12:30:29Z</dc:date>
    </item>
    <item>
      <title>Re: imx8mp-WOL</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8mp-WOL/m-p/2190904#M241577</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;Make sure that phy0 is the one as you can check the RGMII as phymode t&lt;SPAN class="T286Pc" data-sfc-cp="" data-processed="true"&gt;he Ethernet MAC controller node to which the PHY is connected. The &lt;CODE class="o8j0Mc" dir="ltr" data-processed="true"&gt;phy-handle&lt;/CODE&gt; property links the controller to its corresponding PHY node.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN class="T286Pc" data-sfc-cp="" data-processed="true"&gt;Regards&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 22 Oct 2025 16:43:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8mp-WOL/m-p/2190904#M241577</guid>
      <dc:creator>Bio_TICFSL</dc:creator>
      <dc:date>2025-10-22T16:43:51Z</dc:date>
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