topic Re: IMX8MQ with DDR4 (not LPDDR4) valid configuration needed in i.MX Processors

IMX8MQ with DDR4 (not LPDDR4) valid configuration needed

janmodaal — Wed, 15 Oct 2025 08:23:12 GMT

Hello all,
I am busy with starting custom IMX8MQ board using 2x 1GB DDR4 (not LPDDR4).
This application is used: "Config Tools for i.MX Applications Processors".

The power part is copied from IMX8MQ-EVK design, same chip, the DDR voltage is increased to 1.2V.

Tested the app also with MaaX board, the same DDR4 layout.

The DDR tool fails in 'Firmware Init test', and also the rest of DDR tests.

When tested against IMX8MQ-EVK board (LPDDR4), all DDR tests are passed OK.

So my question is - is this DDR tool tested with IMX8MQ with DDR4 ?
If yes - could you provide any link or document with valid configuration ?

I tested all Windows and Linux versions starting from version 24.12, no success with DDR4,
only LPDDR4 of EVK board was OK.

More details below:

This application is installed, starting as Administrator in Windows11 (EN):
"Config Tools for i.MX Applications Processors"
https://www.nxp.com/design/design-center/development-boards-and-designs/i-mx-evaluation-and-development-boards/config-tools-for-i-mx-applications-processors:CONFIG-TOOLS-IMX

The power part is copied from IMX8MQ-EVK design, the same MC32PF4210, i2c address etc
The RAM is 2 pieces ISSI IS43QR16512A-075VBL ( 512Mbitx16)
https://www.issi.com/WW/pdf/43-46QR81024A-16512A.pdf

DDR voltage is set to 1.2V in power manager

MaaX board with IMX8MQ, RAM is DDR4 2x 8Gbit H5AN8G6NAFR-UHC
https://www.tria-technologies.com/product/maaxboard/

Regards,

Re: IMX8MQ with DDR4 (not LPDDR4) valid configuration needed

pengyong_zhang — Wed, 15 Oct 2025 09:21:38 GMT

Hi @janmodaal

Please share your DDR4 datasheet file, and your configuration on DDR Config Tool page, and the ""Init test" fail log.

B.R

Re: IMX8MQ with DDR4 (not LPDDR4) valid configuration needed

janmodaal — Thu, 16 Oct 2025 00:22:33 GMT

Hello pengyong_zhang, thank you for your quick response.

I attach an archive with ISSI memory that I have to start,
screenshot with configuration on DDR Config Tool page, and the Debug log of 'Firmware Init test'

The UART is dual CP2105, the same as on EVK
The power manager is MC32PF4210 A2, thus DDR voltage is 1.2V.

I attached an IMX8MQ-EVK board to the same USB cables, and all tests passed, so USB connection is not an issue.

The board runs correctly with Micron memory MT40A512M16-8Gb-ddr4, but it is EOL, that's why
I am busy on replacement with ISSI or SK Hynix.
In the archive I added also currently working ddr4 config .c file, but I do not have the original
config how the file was generated.

Regards,

Re: IMX8MQ with DDR4 (not LPDDR4) valid configuration needed

pengyong_zhang — Thu, 16 Oct 2025 06:33:55 GMT

Hi @janmodaal

Please share your schematic file.

B.R

Re: IMX8MQ with DDR4 (not LPDDR4) valid configuration needed

janmodaal — Fri, 17 Oct 2025 14:48:20 GMT

Hi @pengyong_zhang

Here is an archive with relevant imx8 pieces.

The imx8 first USB port is connected with usb2.0 cable, not shown in diagram

What is different with EVK board - the watchdog output pin GPIO1_IO02 is not connected as nWDOG.

As a workaround, we use pin PMIC_ON_REQ to request power toggling of IMX8+eMMC+DDR to external FPGA controller.

In arm-trusted-boot is done with a patch proposed for imx7 from

https://community.toradex.com/t/e10574-watchdog-a-watchdog-timeout-or-software-trigger-will-not-reset-the-soc/18205

...

static void __dead2 imx_wdog_restart(bool external_reset)

{

...

#pragma message "ATF: toggle pin PWR_ON for reboot"

uint32_t val2 = mmio_read_32(IMX_SNVS_BASE + SNVS_LPCR);

val2 |= SNVS_LPCR_SRTC_ENV | SNVS_LPCR_DP_EN | SNVS_LPCR_TOP;

mmio_write_32(IMX_SNVS_BASE + SNVS_LPCR, val2);

...

Regards,

Re: IMX8MQ with DDR4 (not LPDDR4) valid configuration needed

pengyong_zhang — Mon, 20 Oct 2025 05:35:29 GMT

Hi @janmodaal

Your DDR configuration is no problem. pleaser try use the below DDR stress tool. and use the attachment .ds file for the DDR stress.

https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX-8M-Family-DDR-Tool-Release/ta-p/1104467

B.R

Re: IMX8MQ with DDR4 (not LPDDR4) valid configuration needed

janmodaal — Tue, 21 Oct 2025 08:05:09 GMT

Hello @pengyong_zhang

Thanks for the .ds file, I see it was generated from MX8M_DDR4_RPA_v18.xlsx
https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX8M-m850D-DDR-Register-Programming-Aid-RPA/ta-p/1172441

It worked with Program mscale_ddr_tool_v3.31_setup.exe.zip downloaded from
https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX-8M-Family-DDR-Tool-Release/ta-p/1104467

It did not work with more recent "Config Tools for i.MX Applications Processors"
https://www.nxp.com/design/design-center/development-boards-and-designs/i-mx-evaluation-and-development-boards/config-tools-for-i-mx-applications-processors:CONFIG-TOOLS-IMX
I tried importing the .ds file there, but UART communication with IMX8 during "DDR Test" -> "Firmware Init test" always resulted in timeout (no response from target)
Tested all linux and windows versions 24.12, 25.03, 25.06, 25.09.

What I did as extra settings - in windows Device manager for COM port settings of CP2105 I disabled power management + set the speed to 115200.
Also, enabled Windows sounds when a USB device is added/removed, to be clear when IMX8 serial download HID device was detected

Regards,