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    <title>i.MX Processorsのトピックi.MX95 - DDR Quick Boot: Questions on Optimal Training Conditions and Production Use</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX95-DDR-Quick-Boot-Questions-on-Optimal-Training-Conditions/m-p/2179922#M241140</link>
    <description>&lt;P class=""&gt;&lt;SPAN&gt;Hello, I need help optimizing the boot time for an i.MX95, specifically improving the DDR initialization time.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN&gt;According to document&amp;nbsp;&lt;/SPAN&gt;&lt;A href="https://docs.nxp.com/bundle/AN14093/page/topics/results.html" target="_self"&gt;&lt;STRONG&gt;&lt;SPAN&gt;AN14094&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;/A&gt;&lt;SPAN&gt;, it's possible to reduce the time from&amp;nbsp;&lt;/SPAN&gt;&lt;STRONG&gt;&lt;SPAN&gt;5053 ms to about 20 ms&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;SPAN&gt;. I tried using the&amp;nbsp;&lt;/SPAN&gt;qb&lt;SPAN&gt;&amp;nbsp;(quick boot) command in U-Boot:&lt;/SPAN&gt;&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;qb        - DDR Quick Boot sub system
do_qbops cp is null
qb - DDR Quick Boot sub system

Usage:
qb check - check if quick boot data is stored in mem by training flow
qb save [interface] [dev]  - save quick boot data in NVM location    =&amp;gt; trigger quick boot flow
qb erase [interface] [dev] - erase quick boot data from NVM location =&amp;gt; trigger training flow&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;After saving the data with&amp;nbsp;&lt;/SPAN&gt;qb save&lt;SPAN&gt;, the boot time&amp;nbsp;&lt;/SPAN&gt;&lt;STRONG&gt;&lt;SPAN&gt;decreased by 5 seconds&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;SPAN&gt;:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Before:&lt;/STRONG&gt;&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;DDR OEI: TRAINING complete in 4904236 us&lt;/LI-CODE&gt;&lt;P&gt;&lt;STRONG&gt;After:&lt;/STRONG&gt;&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;DDR OEI: Quickboot FW run complete in 1032 us
DDR OEI: ACSM SRAM restore in 203 us&lt;/LI-CODE&gt;&lt;P class=""&gt;&amp;nbsp;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN&gt;I then tried to automate using this data in the Yocto image build. Noting that in the&amp;nbsp;&lt;/SPAN&gt;imx-boot&lt;SPAN&gt;&amp;nbsp;recipe, the&amp;nbsp;&lt;/SPAN&gt;soc.mak&lt;SPAN&gt;&amp;nbsp;file is set up to use quick boot data (it expects a file called&amp;nbsp;&lt;/SPAN&gt;qb_data.bin&lt;SPAN&gt;). I extracted my quick boot data using&amp;nbsp;&lt;/SPAN&gt;dd&lt;SPAN&gt;&amp;nbsp;and included it in the recipe.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN&gt;This seemed to work initially, but I encountered some issues:&lt;/SPAN&gt;&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;&lt;P class=""&gt;&lt;SPAN&gt;The&amp;nbsp;&lt;/SPAN&gt;&lt;STRONG&gt;&lt;SPAN&gt;first time&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;SPAN&gt;, I saved the data at&amp;nbsp;&lt;/SPAN&gt;&lt;STRONG&gt;&lt;SPAN&gt;room temperature (SoC temp: 45°C)&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;SPAN&gt;. When the device was subjected to&amp;nbsp;&lt;/SPAN&gt;&lt;STRONG&gt;&lt;SPAN&gt;much higher temperatures, the system became unstable and locked up&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;SPAN&gt;.&lt;/SPAN&gt;&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P class=""&gt;&lt;SPAN&gt;The&amp;nbsp;&lt;/SPAN&gt;&lt;STRONG&gt;&lt;SPAN&gt;second time&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;SPAN&gt;, I saved the data at a&amp;nbsp;&lt;/SPAN&gt;&lt;STRONG&gt;&lt;SPAN&gt;high temperature in a chamber (SoC temp: 80°C)&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;SPAN&gt;. This data seems to work correctly at&amp;nbsp;&lt;/SPAN&gt;&lt;STRONG&gt;&lt;SPAN&gt;both low and high temperatures&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;SPAN&gt;.&lt;/SPAN&gt;&lt;/P&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;P class=""&gt;&lt;SPAN&gt;This leads me to two important questions:&lt;/SPAN&gt;&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;&lt;P class=""&gt;&lt;SPAN&gt;What are the&amp;nbsp;&lt;/SPAN&gt;&lt;STRONG&gt;&lt;SPAN&gt;ideal conditions&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;SPAN&gt;&amp;nbsp;for generating this quick boot data?&lt;/SPAN&gt;&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P class=""&gt;&lt;SPAN&gt;Is there a risk that this data needs to be generated for&amp;nbsp;&lt;/SPAN&gt;&lt;STRONG&gt;&lt;SPAN&gt;each individual device&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;SPAN&gt;, or is it possible to have&amp;nbsp;&lt;/SPAN&gt;&lt;STRONG&gt;&lt;SPAN&gt;universal data&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;SPAN&gt;&amp;nbsp;that can be used in production for an entire batch?&lt;/SPAN&gt;&lt;/P&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;&lt;SPAN&gt;Best regards.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Fri, 03 Oct 2025 13:40:53 GMT</pubDate>
    <dc:creator>mmarretta</dc:creator>
    <dc:date>2025-10-03T13:40:53Z</dc:date>
    <item>
      <title>i.MX95 - DDR Quick Boot: Questions on Optimal Training Conditions and Production Use</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX95-DDR-Quick-Boot-Questions-on-Optimal-Training-Conditions/m-p/2179922#M241140</link>
      <description>&lt;P class=""&gt;&lt;SPAN&gt;Hello, I need help optimizing the boot time for an i.MX95, specifically improving the DDR initialization time.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN&gt;According to document&amp;nbsp;&lt;/SPAN&gt;&lt;A href="https://docs.nxp.com/bundle/AN14093/page/topics/results.html" target="_self"&gt;&lt;STRONG&gt;&lt;SPAN&gt;AN14094&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;/A&gt;&lt;SPAN&gt;, it's possible to reduce the time from&amp;nbsp;&lt;/SPAN&gt;&lt;STRONG&gt;&lt;SPAN&gt;5053 ms to about 20 ms&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;SPAN&gt;. I tried using the&amp;nbsp;&lt;/SPAN&gt;qb&lt;SPAN&gt;&amp;nbsp;(quick boot) command in U-Boot:&lt;/SPAN&gt;&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;qb        - DDR Quick Boot sub system
do_qbops cp is null
qb - DDR Quick Boot sub system

Usage:
qb check - check if quick boot data is stored in mem by training flow
qb save [interface] [dev]  - save quick boot data in NVM location    =&amp;gt; trigger quick boot flow
qb erase [interface] [dev] - erase quick boot data from NVM location =&amp;gt; trigger training flow&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;After saving the data with&amp;nbsp;&lt;/SPAN&gt;qb save&lt;SPAN&gt;, the boot time&amp;nbsp;&lt;/SPAN&gt;&lt;STRONG&gt;&lt;SPAN&gt;decreased by 5 seconds&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;SPAN&gt;:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Before:&lt;/STRONG&gt;&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;DDR OEI: TRAINING complete in 4904236 us&lt;/LI-CODE&gt;&lt;P&gt;&lt;STRONG&gt;After:&lt;/STRONG&gt;&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;DDR OEI: Quickboot FW run complete in 1032 us
DDR OEI: ACSM SRAM restore in 203 us&lt;/LI-CODE&gt;&lt;P class=""&gt;&amp;nbsp;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN&gt;I then tried to automate using this data in the Yocto image build. Noting that in the&amp;nbsp;&lt;/SPAN&gt;imx-boot&lt;SPAN&gt;&amp;nbsp;recipe, the&amp;nbsp;&lt;/SPAN&gt;soc.mak&lt;SPAN&gt;&amp;nbsp;file is set up to use quick boot data (it expects a file called&amp;nbsp;&lt;/SPAN&gt;qb_data.bin&lt;SPAN&gt;). I extracted my quick boot data using&amp;nbsp;&lt;/SPAN&gt;dd&lt;SPAN&gt;&amp;nbsp;and included it in the recipe.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN&gt;This seemed to work initially, but I encountered some issues:&lt;/SPAN&gt;&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;&lt;P class=""&gt;&lt;SPAN&gt;The&amp;nbsp;&lt;/SPAN&gt;&lt;STRONG&gt;&lt;SPAN&gt;first time&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;SPAN&gt;, I saved the data at&amp;nbsp;&lt;/SPAN&gt;&lt;STRONG&gt;&lt;SPAN&gt;room temperature (SoC temp: 45°C)&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;SPAN&gt;. When the device was subjected to&amp;nbsp;&lt;/SPAN&gt;&lt;STRONG&gt;&lt;SPAN&gt;much higher temperatures, the system became unstable and locked up&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;SPAN&gt;.&lt;/SPAN&gt;&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P class=""&gt;&lt;SPAN&gt;The&amp;nbsp;&lt;/SPAN&gt;&lt;STRONG&gt;&lt;SPAN&gt;second time&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;SPAN&gt;, I saved the data at a&amp;nbsp;&lt;/SPAN&gt;&lt;STRONG&gt;&lt;SPAN&gt;high temperature in a chamber (SoC temp: 80°C)&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;SPAN&gt;. This data seems to work correctly at&amp;nbsp;&lt;/SPAN&gt;&lt;STRONG&gt;&lt;SPAN&gt;both low and high temperatures&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;SPAN&gt;.&lt;/SPAN&gt;&lt;/P&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;P class=""&gt;&lt;SPAN&gt;This leads me to two important questions:&lt;/SPAN&gt;&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;&lt;P class=""&gt;&lt;SPAN&gt;What are the&amp;nbsp;&lt;/SPAN&gt;&lt;STRONG&gt;&lt;SPAN&gt;ideal conditions&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;SPAN&gt;&amp;nbsp;for generating this quick boot data?&lt;/SPAN&gt;&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P class=""&gt;&lt;SPAN&gt;Is there a risk that this data needs to be generated for&amp;nbsp;&lt;/SPAN&gt;&lt;STRONG&gt;&lt;SPAN&gt;each individual device&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;SPAN&gt;, or is it possible to have&amp;nbsp;&lt;/SPAN&gt;&lt;STRONG&gt;&lt;SPAN&gt;universal data&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;SPAN&gt;&amp;nbsp;that can be used in production for an entire batch?&lt;/SPAN&gt;&lt;/P&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;&lt;SPAN&gt;Best regards.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 03 Oct 2025 13:40:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX95-DDR-Quick-Boot-Questions-on-Optimal-Training-Conditions/m-p/2179922#M241140</guid>
      <dc:creator>mmarretta</dc:creator>
      <dc:date>2025-10-03T13:40:53Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX95 - DDR Quick Boot: Questions on Optimal Training Conditions and Production Use</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX95-DDR-Quick-Boot-Questions-on-Optimal-Training-Conditions/m-p/2180074#M241145</link>
      <description>&lt;P&gt;Hello,&lt;BR /&gt;&lt;BR /&gt;As you may already know, i.MX95 is still in pre-production stage so all support to this specific chip is limited, aslo note that all information is subject to change.&lt;BR /&gt;&lt;BR /&gt;I believe that the ideal conditions would be to the expected stress the chip would be exposed to, be it enclosure and or ambient. Since quick boot is a way to reduce phy training, since during the First Boot stage, once the DDR PHY initialization and training is complete, the trained settings are saved to internal RAM by the OEI. The u-boot command “qb save” can then be used to copy these trained settings from internal RAM to the external boot media space reserved by the bootloader.&lt;BR /&gt;&lt;BR /&gt;Based on the above &lt;STRIKE&gt;this could be used as "Universal data" but still I would recommend setting a testing and validate that the trained data is reliable enough for the product&lt;/STRIKE&gt;.&amp;nbsp;&lt;STRONG&gt;EDIT:&amp;nbsp;&lt;/STRONG&gt;it cannot be used as "universal data", since q&lt;SPAN data-teams="true"&gt;uickboot is per board+sample data.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;Best regards/Saludos,&lt;BR /&gt;Aldo.&lt;/P&gt;</description>
      <pubDate>Mon, 09 Mar 2026 16:16:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX95-DDR-Quick-Boot-Questions-on-Optimal-Training-Conditions/m-p/2180074#M241145</guid>
      <dc:creator>AldoG</dc:creator>
      <dc:date>2026-03-09T16:16:33Z</dc:date>
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