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    <title>topic IMX8M Mini: Configure SAI MCLK for 4.096MHz for 16Khz audio on upstream Linux in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/IMX8M-Mini-Configure-SAI-MCLK-for-4-096MHz-for-16Khz-audio-on/m-p/2174559#M240879</link>
    <description>&lt;P&gt;Greetings,&lt;/P&gt;&lt;P&gt;I have a user with a need for native 16KHz audio streaming from an imx8mm SAI3 I2S to SGTL5000 codec.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;The SGTL5000 datasheet specifies that the MCLK must be an integer multiple of the sampling rate, typically 128x, 256x, 384x, or 512x the sampling rate (fs) with a max MCLK of 25MHz. For a 16kHz sampling rate the supported MCLK frequencies are:&lt;BR /&gt;- 2.048MHz (16kHz * 128)&lt;BR /&gt;- 4.096MHz (16kHz * 256)&lt;BR /&gt;- 6.144MHz (16kHz * 384)&lt;BR /&gt;- 8.192MHz (16kHz * 512)&lt;/P&gt;&lt;P&gt;The IMX8MM_AUDIO_PLL1_OUT is 786.432MHz which is an integer multiple of 24.576 MHz, suitable for 32Khz and 48kHz sampling rates IMX8MM_AUDIO_PLL2_OUT is 722.5344Mhz which is an integer multiple of 22.5792 MHz, suitable for 44.1 kHz sampling rates. These would need dividers in order to achieve 4.096MHz.&lt;/P&gt;&lt;P&gt;It looks like before the imx8mm clock driver was upstreamed to the Linux kernel there were options to divide it down but I don't see that in the upstream Linux kernel.&lt;/P&gt;&lt;P&gt;Is there any instructions on how to configure the SAI clock for a divided down rate of 4.096MHz?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Tue, 23 Sep 2025 21:01:28 GMT</pubDate>
    <dc:creator>timharvey</dc:creator>
    <dc:date>2025-09-23T21:01:28Z</dc:date>
    <item>
      <title>IMX8M Mini: Configure SAI MCLK for 4.096MHz for 16Khz audio on upstream Linux</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8M-Mini-Configure-SAI-MCLK-for-4-096MHz-for-16Khz-audio-on/m-p/2174559#M240879</link>
      <description>&lt;P&gt;Greetings,&lt;/P&gt;&lt;P&gt;I have a user with a need for native 16KHz audio streaming from an imx8mm SAI3 I2S to SGTL5000 codec.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;The SGTL5000 datasheet specifies that the MCLK must be an integer multiple of the sampling rate, typically 128x, 256x, 384x, or 512x the sampling rate (fs) with a max MCLK of 25MHz. For a 16kHz sampling rate the supported MCLK frequencies are:&lt;BR /&gt;- 2.048MHz (16kHz * 128)&lt;BR /&gt;- 4.096MHz (16kHz * 256)&lt;BR /&gt;- 6.144MHz (16kHz * 384)&lt;BR /&gt;- 8.192MHz (16kHz * 512)&lt;/P&gt;&lt;P&gt;The IMX8MM_AUDIO_PLL1_OUT is 786.432MHz which is an integer multiple of 24.576 MHz, suitable for 32Khz and 48kHz sampling rates IMX8MM_AUDIO_PLL2_OUT is 722.5344Mhz which is an integer multiple of 22.5792 MHz, suitable for 44.1 kHz sampling rates. These would need dividers in order to achieve 4.096MHz.&lt;/P&gt;&lt;P&gt;It looks like before the imx8mm clock driver was upstreamed to the Linux kernel there were options to divide it down but I don't see that in the upstream Linux kernel.&lt;/P&gt;&lt;P&gt;Is there any instructions on how to configure the SAI clock for a divided down rate of 4.096MHz?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 23 Sep 2025 21:01:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8M-Mini-Configure-SAI-MCLK-for-4-096MHz-for-16Khz-audio-on/m-p/2174559#M240879</guid>
      <dc:creator>timharvey</dc:creator>
      <dc:date>2025-09-23T21:01:28Z</dc:date>
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    <item>
      <title>Re: IMX8M Mini: Configure SAI MCLK for 4.096MHz for 16Khz audio on upstream Linux</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8M-Mini-Configure-SAI-MCLK-for-4-096MHz-for-16Khz-audio-on/m-p/2175950#M240953</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;one can look at solution provided in similar case&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.nxp.com/t5/i-MX-Processors/SAI-on-i-MX8M-Mini/m-p/959805" target="_blank" rel="noopener"&gt;https://community.nxp.com/t5/i-MX-Processors/SAI-on-i-MX8M-Mini/m-p/959805&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Also,&amp;nbsp;please look at Chapter 16 Porting Audio Codecs&amp;nbsp;&lt;A href="https://www.nxp.com/docs/en/user-guide/UG10165.pdf" target="_blank"&gt;https://www.nxp.com/docs/en/user-guide/UG10165.pdf&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Regards&lt;/P&gt;</description>
      <pubDate>Thu, 25 Sep 2025 15:54:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8M-Mini-Configure-SAI-MCLK-for-4-096MHz-for-16Khz-audio-on/m-p/2175950#M240953</guid>
      <dc:creator>Bio_TICFSL</dc:creator>
      <dc:date>2025-09-25T15:54:46Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8M Mini: Configure SAI MCLK for 4.096MHz for 16Khz audio on upstream Linux</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8M-Mini-Configure-SAI-MCLK-for-4-096MHz-for-16Khz-audio-on/m-p/2178922#M241088</link>
      <description>&lt;P&gt;The solution you pointed to is using the downstream vendor kernel which has a&amp;nbsp;&lt;SPAN&gt;IMX8MM_CLK_SAI1_DIV allowing&amp;nbsp;IMX8MM_AUDIO_PLL1_OUT to be divided into additional frequencies - this is missing from the upstream Linux kernel and is what I'm asking about. Is there a way to divide this in the upstream kernel? I'm not that familiar with the Linux clock subsystem.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 01 Oct 2025 17:47:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8M-Mini-Configure-SAI-MCLK-for-4-096MHz-for-16Khz-audio-on/m-p/2178922#M241088</guid>
      <dc:creator>timharvey</dc:creator>
      <dc:date>2025-10-01T17:47:35Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8M Mini: Configure SAI MCLK for 4.096MHz for 16Khz audio on upstream Linux</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8M-Mini-Configure-SAI-MCLK-for-4-096MHz-for-16Khz-audio-on/m-p/2179399#M241117</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;I understand your use case, but unfortunately, the frequencies cannot be changed at run time from the software. The NXP does not provide support for the same.&amp;nbsp;Changes in the device tree are recommended.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards&lt;/P&gt;</description>
      <pubDate>Thu, 02 Oct 2025 14:11:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8M-Mini-Configure-SAI-MCLK-for-4-096MHz-for-16Khz-audio-on/m-p/2179399#M241117</guid>
      <dc:creator>Bio_TICFSL</dc:creator>
      <dc:date>2025-10-02T14:11:26Z</dc:date>
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