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  <channel>
    <title>i.MX Processors中的主题 Re: dtsi for imx8mm single core</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/dtsi-for-imx8mm-single-core/m-p/2172531#M240818</link>
    <description>&lt;P&gt;Ok, interesting.&lt;/P&gt;&lt;P&gt;So, in addition to removing the CPU nodes in the DT, one would also need to change the cooling maps node.&lt;/P&gt;&lt;P&gt;Kind regards,&lt;/P&gt;&lt;P&gt;Markus&lt;/P&gt;</description>
    <pubDate>Fri, 19 Sep 2025 06:17:05 GMT</pubDate>
    <dc:creator>MB_stek</dc:creator>
    <dc:date>2025-09-19T06:17:05Z</dc:date>
    <item>
      <title>dtsi for imx8mm single core</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/dtsi-for-imx8mm-single-core/m-p/2165973#M240622</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;we're using a imx8mm (4x Cortex A53) with Linux. So, our device tree dts includes imx8mm.dtsi (&lt;A href="https://elixir.bootlin.com/linux/v6.11/source/arch/arm64/boot/dts/freescale/imx8mm.dtsi" target="_blank"&gt;https://elixir.bootlin.com/linux/v6.11/source/arch/arm64/boot/dts/freescale/imx8mm.dtsi&lt;/A&gt;) which defines all four A53 cores.&lt;/P&gt;&lt;P&gt;Now our HW department has asked if they can simply replace the imx8mm with a single-core imx8mm (like e.g. the MIMX8MM1CVTKZAA), which are pin compatible, but have only one core. Is it safe to use the same imx8mm.dtsi? If so, will the Linux kernel simply ignore the non-existent other three cores?&lt;/P&gt;&lt;P&gt;Or is there maybe a dedicated .dtsi file for single core?&lt;/P&gt;&lt;P&gt;Or do we need to modify imx8mm.dtsi?&lt;/P&gt;&lt;P&gt;Kind regards,&lt;/P&gt;&lt;P&gt;Markus&lt;/P&gt;</description>
      <pubDate>Tue, 09 Sep 2025 14:21:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/dtsi-for-imx8mm-single-core/m-p/2165973#M240622</guid>
      <dc:creator>MB_stek</dc:creator>
      <dc:date>2025-09-09T14:21:12Z</dc:date>
    </item>
    <item>
      <title>Re: dtsi for imx8mm single core</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/dtsi-for-imx8mm-single-core/m-p/2166103#M240630</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;Leave the 4 cores device tree as it is without remove the unused/non-existent cores in 1 core device is not the best option, could cause from a simple warning to a system hang.&amp;nbsp;&lt;/P&gt;
&lt;P&gt;We do not have a special device tree for single core device but I suggest you remove the&amp;nbsp;non-existent cores in your device tree for the new part number.&lt;/P&gt;
&lt;P&gt;Best regards.&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 09 Sep 2025 18:36:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/dtsi-for-imx8mm-single-core/m-p/2166103#M240630</guid>
      <dc:creator>JorgeCas</dc:creator>
      <dc:date>2025-09-09T18:36:42Z</dc:date>
    </item>
    <item>
      <title>Re: dtsi for imx8mm single core</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/dtsi-for-imx8mm-single-core/m-p/2166317#M240643</link>
      <description>&lt;P&gt;Thanks for the answer, Jorge!&lt;/P&gt;&lt;P&gt;So, we'll plan to use a dedicated device tree there, based on imx8mm.dtsi with the three missing cores removed as CPU nodes.&lt;/P&gt;&lt;P&gt;Kind regards,&lt;/P&gt;&lt;P&gt;Markus&lt;/P&gt;</description>
      <pubDate>Wed, 10 Sep 2025 06:10:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/dtsi-for-imx8mm-single-core/m-p/2166317#M240643</guid>
      <dc:creator>MB_stek</dc:creator>
      <dc:date>2025-09-10T06:10:35Z</dc:date>
    </item>
    <item>
      <title>Re: dtsi for imx8mm single core</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/dtsi-for-imx8mm-single-core/m-p/2167922#M240674</link>
      <description>&lt;P&gt;The iMX's u-boot automatically modifies the Linux device tree to disable the number of cores based on the fuses of different chips.&lt;/P&gt;&lt;P&gt;All you need to do is solder the different chips—it's that simple.&lt;/P&gt;&lt;P&gt;I'm using the lf-5.10.72-2.2.3 code for this demonstration to illustrate that this code was available several years ago, around October 2022.&lt;/P&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;lf-5.10.72-2.2.3&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;A href="https://github.com/nxp-imx/uboot-imx/blob/lf-5.10.72-2.2.3/arch/arm/mach-imx/imx8m/soc.c" target="_blank" rel="noopener"&gt;https://github.com/nxp-imx/uboot-imx/blob/lf-5.10.72-2.2.3/arch/arm/mach-imx/imx8m/soc.c&lt;/A&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;This is code for iMX8MM single core. It deletes 3 core of Linux dts and leave only one.&lt;/DIV&gt;&lt;LI-CODE lang="markup"&gt;else if (is_imx8mms() || is_imx8mmsl())
		disable_cpu_nodes(blob, 3);&lt;/LI-CODE&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;LI-CODE lang="markup"&gt;#elif defined(CONFIG_IMX8MM)
if (is_imx8mml() || is_imx8mmdl() ||  is_imx8mmsl())
disable_vpu_nodes(blob);

if (is_imx8mmd() || is_imx8mmdl())
disable_cpu_nodes(blob, 2);
else if (is_imx8mms() || is_imx8mmsl())
disable_cpu_nodes(blob, 3);&lt;/LI-CODE&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 11 Sep 2025 14:10:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/dtsi-for-imx8mm-single-core/m-p/2167922#M240674</guid>
      <dc:creator>vodix</dc:creator>
      <dc:date>2025-09-11T14:10:31Z</dc:date>
    </item>
    <item>
      <title>Re: dtsi for imx8mm single core</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/dtsi-for-imx8mm-single-core/m-p/2172058#M240803</link>
      <description>&lt;P&gt;Thanks for the hint with imx u-boot!&lt;/P&gt;&lt;P&gt;We're using mainline u-boot, but this of course helps for inspiration &lt;LI-EMOJI id="lia_slightly-smiling-face" title=":slightly_smiling_face:"&gt;&lt;/LI-EMOJI&gt;&lt;/P&gt;&lt;P&gt;Kind regards,&lt;/P&gt;&lt;P&gt;Markus&lt;/P&gt;</description>
      <pubDate>Thu, 18 Sep 2025 13:59:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/dtsi-for-imx8mm-single-core/m-p/2172058#M240803</guid>
      <dc:creator>MB_stek</dc:creator>
      <dc:date>2025-09-18T13:59:11Z</dc:date>
    </item>
    <item>
      <title>Re: dtsi for imx8mm single core</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/dtsi-for-imx8mm-single-core/m-p/2172350#M240806</link>
      <description>&lt;P&gt;This is long-standing code from the NXP iMX BSP.&lt;/P&gt;&lt;P&gt;However, &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/203308"&gt;@JorgeCas&lt;/a&gt;&amp;nbsp;@ stated that there's no existing code for a single core. We might need to confirm this with &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/203308"&gt;@JorgeCas&lt;/a&gt;&amp;nbsp;.&lt;/P&gt;</description>
      <pubDate>Fri, 19 Sep 2025 00:21:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/dtsi-for-imx8mm-single-core/m-p/2172350#M240806</guid>
      <dc:creator>vodix</dc:creator>
      <dc:date>2025-09-19T00:21:55Z</dc:date>
    </item>
    <item>
      <title>Re: dtsi for imx8mm single core</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/dtsi-for-imx8mm-single-core/m-p/2172356#M240808</link>
      <description>&lt;P&gt;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/203308"&gt;@JorgeCas&lt;/a&gt;&amp;nbsp;@, could you please comment on your answer to confirm that the code for dynamically modifying the DTB in the NXP IMX BSP is valid and correct&lt;/P&gt;</description>
      <pubDate>Fri, 19 Sep 2025 00:32:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/dtsi-for-imx8mm-single-core/m-p/2172356#M240808</guid>
      <dc:creator>vodix</dc:creator>
      <dc:date>2025-09-19T00:32:18Z</dc:date>
    </item>
    <item>
      <title>Re: dtsi for imx8mm single core</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/dtsi-for-imx8mm-single-core/m-p/2172360#M240809</link>
      <description>&lt;P&gt;Mainline u-boot also has this code.&lt;/P&gt;&lt;P&gt;&lt;A href="https://github.com/u-boot/u-boot/blob/master/arch/arm/mach-imx/imx8m/soc.c#L1415" target="_blank"&gt;https://github.com/u-boot/u-boot/blob/master/arch/arm/mach-imx/imx8m/soc.c#L1415&lt;/A&gt;&lt;/P&gt;&lt;LI-CODE lang="markup"&gt; #elif IS_ENABLED(CONFIG_IMX8MM)
	if (is_imx8mml() || is_imx8mmdl() ||  is_imx8mmsl())
		disable_vpu_nodes(blob);

	if (is_imx8mmd() || is_imx8mmdl())
		disable_cpu_nodes(blob, nodes_path, 2, 4);
	else if (is_imx8mms() || is_imx8mmsl())
		disable_cpu_nodes(blob, nodes_path, 3, 4);&lt;/LI-CODE&gt;</description>
      <pubDate>Fri, 19 Sep 2025 00:38:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/dtsi-for-imx8mm-single-core/m-p/2172360#M240809</guid>
      <dc:creator>vodix</dc:creator>
      <dc:date>2025-09-19T00:38:01Z</dc:date>
    </item>
    <item>
      <title>Re: dtsi for imx8mm single core</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/dtsi-for-imx8mm-single-core/m-p/2172531#M240818</link>
      <description>&lt;P&gt;Ok, interesting.&lt;/P&gt;&lt;P&gt;So, in addition to removing the CPU nodes in the DT, one would also need to change the cooling maps node.&lt;/P&gt;&lt;P&gt;Kind regards,&lt;/P&gt;&lt;P&gt;Markus&lt;/P&gt;</description>
      <pubDate>Fri, 19 Sep 2025 06:17:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/dtsi-for-imx8mm-single-core/m-p/2172531#M240818</guid>
      <dc:creator>MB_stek</dc:creator>
      <dc:date>2025-09-19T06:17:05Z</dc:date>
    </item>
    <item>
      <title>Re: dtsi for imx8mm single core</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/dtsi-for-imx8mm-single-core/m-p/2172869#M240833</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;You are right.&lt;/P&gt;
&lt;P&gt;U-boot code will change the CPU node status to "disabled" based on CPU information mentioned in fuses.&lt;/P&gt;
&lt;P&gt;Just make sure that source code includes this feature.&lt;/P&gt;
&lt;P&gt;Best regards.&lt;/P&gt;</description>
      <pubDate>Fri, 19 Sep 2025 15:25:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/dtsi-for-imx8mm-single-core/m-p/2172869#M240833</guid>
      <dc:creator>JorgeCas</dc:creator>
      <dc:date>2025-09-19T15:25:03Z</dc:date>
    </item>
    <item>
      <title>Re: dtsi for imx8mm single core</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/dtsi-for-imx8mm-single-core/m-p/2173046#M240840</link>
      <description>&lt;P&gt;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/203308"&gt;@JorgeCas&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;disable_cpu_nodes does two things: delete the cpu node and disable the thermal nodes related to the deleted cpu node.&lt;BR /&gt;It is not change the CPU node status to "disabled" you mentioned.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;rc = fdt_del_node(blob, nodeoff);&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;A href="https://github.com/u-boot/u-boot/blob/master/arch/arm/mach-imx/fdt.c" target="_blank" rel="noopener"&gt;https://github.com/u-boot/u-boot/blob/master/arch/arm/mach-imx/fdt.c&lt;/A&gt;&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;int disable_cpu_nodes(void *blob, const char * const *nodes_path, u32 num_disabled_cores,
		      u32 max_cores)
{
	u32 i = 0;
	int rc;
	int nodeoff;

	if (max_cores == 0 || (num_disabled_cores &amp;gt; (max_cores - 1)))
		return -EINVAL;

	i = max_cores - num_disabled_cores;

	for (; i &amp;lt; max_cores; i++) {
		nodeoff = fdt_path_offset(blob, nodes_path[i]);
		if (nodeoff &amp;lt; 0)
			continue; /* Not found, skip it */

		debug("Found %s node\n", nodes_path[i]);

		rc = fdt_del_node(blob, nodeoff);
		if (rc &amp;lt; 0) {
			printf("Unable to delete node %s, err=%s\n",
			       nodes_path[i], fdt_strerror(rc));
		} else {
			printf("Delete node %s\n", nodes_path[i]);
		}
	}

	disable_thermal_cpu_nodes(blob, num_disabled_cores, max_cores);

	return 0;
}&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Sat, 20 Sep 2025 04:45:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/dtsi-for-imx8mm-single-core/m-p/2173046#M240840</guid>
      <dc:creator>kawateb265</dc:creator>
      <dc:date>2025-09-20T04:45:15Z</dc:date>
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