IMX93 SAI3 FSYNC

KMES — Fri, 05 Sep 2025 09:38:56 GMT

I'm using i.MX93 SAI3 audio interface to control "ADS8354" ADC with the following settings:

External clock 20 MHz

clock_root_config_t saiClkCfg = { .clockOff = true, .mux = kCLOCK_SAI3_ClockRoot_MuxExt, .div = 1, };

SAI3 configuration

sai_transceiver_t saiConfig; SAI_GetClassicI2SConfig(saiConfig,kSAI_WordWidth16bits,kSAI_Stereo,0x01); saiConfig.bitClock.bclkPolarity = kSAI_SampleOnFallingEdge; saiConfig.serialData.dataWord0Length = 18; saiConfig.frameSync.frameSyncWidth = 2; saiConfig.serialData.dataWordNum = 3; saiConfig.frameSync.frameSyncEarly = false; saiConfig.frameSync.frameSyncPolarity = kSAI_PolarityActiveHigh; SAI_TxSetConfig(SAI3, &g_saiConfig); g_saiConfig.masterSlave = kSAI_Master; g_saiConfig.syncMode = kSAI_ModeSync; SAI_RxSetConfig(SAI3, &g_saiConfig); SAI_TxSetBitClockRate(SAI3, 20000000, 400000, 50, 1); SAI_RxSetBitClockRate(SAI3, 20000000, 400000, 50, 1);

target FSYNC/ADC_CS frequency: 400 KHz = 20Mhz / (18 bits + 2x16bits) = 20000000/50

Measured FSYNC/ADC_CS frequency: 200 KHz

Question: How can I generate an FSYNC/ADC_CS signal at 400 kHz with a frame length of 50 bits and 20 MHz external clock ?

NB: Worked properly using a 40 MHz external clock

M33 SDK version: SDK_2_14_0_MCIMX93-EVK

Re: IMX93 SAI3 FSYNC

joanxie — Mon, 08 Sep 2025 07:40:05 GMT

what mode do you use? TDM mode?

Re: IMX93 SAI3 FSYNC

KMES — Mon, 15 Sep 2025 13:58:13 GMT

Yes with TDM mode.

PS: SYWD[8:12] of RCR4/TRC4 equal 0 (1 bit-clock cycle)

saiConfig.frameSync.frameSyncWidth = 1;

Re: IMX93 SAI3 FSYNC

joanxie — Fri, 19 Sep 2025 08:02:21 GMT

sorry for my delay, I took my AL this week, since you use TDM mode, but the SAI_GetClassicI2SConfig is for I2S mode, and you only set one channel according to the function as below, pls check these settings again

SAI_TxSetBitClockRate(SAI3, 20000000, 400000, 50, 1);

topic Re: IMX93 SAI3 FSYNC in i.MX Processors

IMX93 SAI3 FSYNC

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Re: IMX93 SAI3 FSYNC