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    <title>topic i.MX 8M Plus Cortex-M7 code/data trace into ETF in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX-8M-Plus-Cortex-M7-code-data-trace-into-ETF/m-p/2155281#M240226</link>
    <description>&lt;P&gt;Hi all,&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;I am having some issues in getting ETM/ITM (data/code) trace from Cortex-M7 into ETF/ETR. There is a schema I found in reference manual in attachment.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;My notes (please observe also attached image when reading this):&lt;/SPAN&gt;&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;&lt;DIV&gt;ETM (code) trace works for me from Cortex-A53 core, so it seems that&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;&lt;STRONG&gt;&lt;FONT color="#008000"&gt;green path&lt;/FONT&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;/SPAN&gt;is operational.&lt;/DIV&gt;&lt;/LI&gt;&lt;LI&gt;&lt;DIV&gt;ETM/ITM (code/data) trace does not work for me from Cortex-M7 core, so it seems&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;&lt;STRONG&gt;&lt;FONT color="#FF9900"&gt;orange path&lt;/FONT&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;/SPAN&gt;is not operational&lt;/DIV&gt;&lt;/LI&gt;&lt;LI&gt;As you can see in image there are 3 ATB Funnels (marked with numbers)&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;My questions:&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;&lt;SPAN&gt;There are 3 ATB Funnels, but in debug memory map I only found 2:&lt;/SPAN&gt;&lt;OL&gt;&lt;LI&gt;&lt;SPAN&gt;On APB bus (APSEL 1) on address 0x80C03000 &amp;lt;- I assume this is either funnel #1 or #2 on image above (this one is also documented in Reference Manual)&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN&gt;On AHB (M7) bus (APSEL 4) on address 0xE0043000 &amp;lt;- I assume this is funnel #3 on image above (this one is not documented in Reference Manual)&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN&gt;Where is the third one?&lt;/SPAN&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN&gt;Is there something else that should be configured for Cortex-M7 core trace to work?&lt;/SPAN&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;&lt;SPAN&gt;Thank you for your help.&lt;/SPAN&gt;&lt;/P&gt;</description>
    <pubDate>Wed, 20 Aug 2025 13:13:02 GMT</pubDate>
    <dc:creator>tadejm</dc:creator>
    <dc:date>2025-08-20T13:13:02Z</dc:date>
    <item>
      <title>i.MX 8M Plus Cortex-M7 code/data trace into ETF</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX-8M-Plus-Cortex-M7-code-data-trace-into-ETF/m-p/2155281#M240226</link>
      <description>&lt;P&gt;Hi all,&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;I am having some issues in getting ETM/ITM (data/code) trace from Cortex-M7 into ETF/ETR. There is a schema I found in reference manual in attachment.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;My notes (please observe also attached image when reading this):&lt;/SPAN&gt;&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;&lt;DIV&gt;ETM (code) trace works for me from Cortex-A53 core, so it seems that&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;&lt;STRONG&gt;&lt;FONT color="#008000"&gt;green path&lt;/FONT&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;/SPAN&gt;is operational.&lt;/DIV&gt;&lt;/LI&gt;&lt;LI&gt;&lt;DIV&gt;ETM/ITM (code/data) trace does not work for me from Cortex-M7 core, so it seems&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;&lt;STRONG&gt;&lt;FONT color="#FF9900"&gt;orange path&lt;/FONT&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;/SPAN&gt;is not operational&lt;/DIV&gt;&lt;/LI&gt;&lt;LI&gt;As you can see in image there are 3 ATB Funnels (marked with numbers)&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;My questions:&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;&lt;SPAN&gt;There are 3 ATB Funnels, but in debug memory map I only found 2:&lt;/SPAN&gt;&lt;OL&gt;&lt;LI&gt;&lt;SPAN&gt;On APB bus (APSEL 1) on address 0x80C03000 &amp;lt;- I assume this is either funnel #1 or #2 on image above (this one is also documented in Reference Manual)&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN&gt;On AHB (M7) bus (APSEL 4) on address 0xE0043000 &amp;lt;- I assume this is funnel #3 on image above (this one is not documented in Reference Manual)&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN&gt;Where is the third one?&lt;/SPAN&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN&gt;Is there something else that should be configured for Cortex-M7 core trace to work?&lt;/SPAN&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;&lt;SPAN&gt;Thank you for your help.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 20 Aug 2025 13:13:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX-8M-Plus-Cortex-M7-code-data-trace-into-ETF/m-p/2155281#M240226</guid>
      <dc:creator>tadejm</dc:creator>
      <dc:date>2025-08-20T13:13:02Z</dc:date>
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