topic Re: External SAI MCLK input on IMX8M PLUS in i.MX Processors

External SAI MCLK input on IMX8M PLUS

coulomz — Sun, 27 Jul 2025 22:30:48 GMT

I'm looking into adding an external clock as a master clock input on one of the SAI's (for example SAI2) in the IMX8M plus.

The reference manual on chapter 14.1.1.1 states

"The MCLK pin on each SAI module can be configured as either an input or an output. [...] When configured as an input, the external input to the pad will be used as SAIn_MCLK and is routed to SAIn_MCLK_IN, which can be used as master clock for SAI."

However, there don't seem to be any registers in the GPR's that set the SAIn_MCLK as input, in contrast to the IMX8M mini and IMX8M nano.

Below are screenshots of the GPR2 in the IMX8M nano and plus.

IMX8M nano GPR2 (has ext_mclk_en)

IMX8M plus GPR2

Does this mean it is not supported? Am I missing something?

Thanks in advance, any help would be much appreciated.

Re: External SAI MCLK input on IMX8M PLUS

xiaocong_fu — Mon, 28 Jul 2025 09:53:45 GMT

1. You can configure the "14.2.3.1.10 SAI2 MCLK SELECT Register" as SPDIF.EXTCLK.

2. You can configure the "8.2.4.115 SW_MUX_CTL_PAD_SPDIF_EXT_CLK" as ALT0_AUDIOMIX_SPDIF1_EXT_CLK.

3. You can configure the "14.4.4.1.30 MCLK Control" as MCLK signal pin is an input.

Re: External SAI MCLK input on IMX8M PLUS

coulomz — Mon, 28 Jul 2025 12:44:39 GMT

Hello,

Thanks for the reply and support.

Are the registers you provided specific to setting the clock for SPDIF transmission?

From my understanding setting the SAI2 MCLK SELECT Register as SPDIF.EXTCLK can still be used to provide an external master clock to the SAI in order to output I2S signals.