<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: How to Reduce A-core Frequency on i.MX8ULP in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/How-to-Reduce-A-core-Frequency-on-i-MX8ULP/m-p/2136650#M239393</link>
    <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;I think is not possible with PLL, please check this appnote:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.nxp.com/docs/en/application-note/AN13951.pdf" target="_blank"&gt;https://www.nxp.com/docs/en/application-note/AN13951.pdf&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;A href="https://docs.nxp.com/bundle/AN14486/page/topics/introduction.html" target="_blank"&gt;https://docs.nxp.com/bundle/AN14486/page/topics/introduction.html&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards&lt;/P&gt;</description>
    <pubDate>Fri, 18 Jul 2025 15:16:29 GMT</pubDate>
    <dc:creator>Bio_TICFSL</dc:creator>
    <dc:date>2025-07-18T15:16:29Z</dc:date>
    <item>
      <title>How to Reduce A-core Frequency on i.MX8ULP</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-Reduce-A-core-Frequency-on-i-MX8ULP/m-p/2136572#M239388</link>
      <description>&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I'm working on a project using the &lt;STRONG&gt;i.MX8ULP&lt;/STRONG&gt; processor, and I’m trying to reduce the &lt;STRONG&gt;A-core (Cortex-A35)&lt;/STRONG&gt; clock frequency to &lt;STRONG&gt;around 40–50 MHz&lt;/STRONG&gt; in order to lower the overall power consumption.&lt;/P&gt;&lt;P&gt;Currently, I’m using the following steps to switch the A-core clock source and adjust PLL settings:&lt;/P&gt;&lt;BLOCKQUOTE&gt;&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;&lt;P&gt;# Switch A35 to FRO 192 MHz&lt;BR /&gt;/unit_tests/memtool -32 0x292c0014=0x08000000&lt;/P&gt;&lt;P&gt;# Disable PLL2&lt;BR /&gt;/unit_tests/memtool -32 0x292c0500=0x03000000&lt;/P&gt;&lt;P&gt;# Read division and multiplication factors&lt;BR /&gt;/unit_tests/memtool -32 0x292c0014 1&lt;BR /&gt;/unit_tests/memtool -32 0x292c0510 1&lt;/P&gt;&lt;P&gt;# Enable PLL2&lt;BR /&gt;/unit_tests/memtool -32 0x292c0500=0x03000001&lt;/P&gt;&lt;P&gt;# Switch A35 back to PLL2&lt;BR /&gt;/unit_tests/memtool -32 0x292c0014=0x18000000&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;However,&amp;nbsp;&amp;nbsp;I need to bring it down to the &lt;STRONG&gt;40–50 MHz&lt;/STRONG&gt; range for this how can i able to achieve this?&amp;nbsp;&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;&lt;P&gt;Is it possible to run the A35 core at 40–50 MHz on the i.MX8ULP?&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P&gt;If so, how should the clock source and dividers be configured to achieve this?&lt;/P&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 18 Jul 2025 12:56:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-Reduce-A-core-Frequency-on-i-MX8ULP/m-p/2136572#M239388</guid>
      <dc:creator>YashParekh</dc:creator>
      <dc:date>2025-07-18T12:56:47Z</dc:date>
    </item>
    <item>
      <title>Re: How to Reduce A-core Frequency on i.MX8ULP</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-Reduce-A-core-Frequency-on-i-MX8ULP/m-p/2136650#M239393</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;I think is not possible with PLL, please check this appnote:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.nxp.com/docs/en/application-note/AN13951.pdf" target="_blank"&gt;https://www.nxp.com/docs/en/application-note/AN13951.pdf&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;A href="https://docs.nxp.com/bundle/AN14486/page/topics/introduction.html" target="_blank"&gt;https://docs.nxp.com/bundle/AN14486/page/topics/introduction.html&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards&lt;/P&gt;</description>
      <pubDate>Fri, 18 Jul 2025 15:16:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-Reduce-A-core-Frequency-on-i-MX8ULP/m-p/2136650#M239393</guid>
      <dc:creator>Bio_TICFSL</dc:creator>
      <dc:date>2025-07-18T15:16:29Z</dc:date>
    </item>
  </channel>
</rss>

