https://community.nxp.com/t5/i-MX-Processors/IMX-93-SCTR-and-WDOG-debug-mode/m-p/2133312#M239251 <P><SPAN>Hello, I learned from the RM that the control registers for wdog and sctr in imx93 both contain debug bits. However, when I enable these bits, neither module enters debug mode: the sctr cannot be halted in debug mode, and the wdog still resets in debug mode. What could be the reason for this? How can it be resolved? Thank you!</SPAN></P> Mon, 14 Jul 2025 11:52:53 GMT leoX 2025-07-14T11:52:53Z https://community.nxp.com/t5/i-MX-Processors/IMX-93-SCTR-and-WDOG-debug-mode/m-p/2133312#M239251 <P><SPAN>Hello, I learned from the RM that the control registers for wdog and sctr in imx93 both contain debug bits. However, when I enable these bits, neither module enters debug mode: the sctr cannot be halted in debug mode, and the wdog still resets in debug mode. What could be the reason for this? How can it be resolved? Thank you!</SPAN></P> Mon, 14 Jul 2025 11:52:53 GMT https://community.nxp.com/t5/i-MX-Processors/IMX-93-SCTR-and-WDOG-debug-mode/m-p/2133312#M239251 leoX 2025-07-14T11:52:53Z