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    <title>topic Re: i.MX91 Secure Storage in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX91-Secure-Storage/m-p/2116650#M238239</link>
    <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/61445"&gt;@nxp&lt;/a&gt;&lt;/P&gt;&lt;P&gt;I As I have mentioned in my previous mails. I am trying to implement secure storage on i.MX91 by encrypting a partition.&lt;BR /&gt;Below are the steps I am following to for the same.&lt;BR /&gt;&lt;BR /&gt;1. Enabled below features in OP-TEE&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;core/arch/arm/plat-imx/conf.mk&lt;/P&gt;&lt;P&gt;#CFG_IMX_TRUSTED_ARM_CE ?= y&lt;BR /&gt;CFG_HWRNG_QUALITY ?= 1024&lt;BR /&gt;CFG_WITH_SOFTWARE_PRNG ?= n&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&amp;nbsp;mk/config.mk&lt;/P&gt;&lt;P&gt;CFG_HWRNG_PTA ?= y&lt;BR /&gt;&lt;BR /&gt;2. Kernel features&lt;/P&gt;&lt;P&gt;CONFIG_DM_CRYPT=y&lt;BR /&gt;CONFIG_TRUSTED_KEYS=y&lt;BR /&gt;CONFIG_TRUSTED_KEYS_TEE=y&lt;BR /&gt;CONFIG_TEE_CRYPTO=y&lt;BR /&gt;CONFIG_BLK_DEV_DM=y&lt;BR /&gt;&lt;BR /&gt;3. Applied patches of above OP-TEE and kernel features in Yocto and built.&lt;/P&gt;&lt;P&gt;4. There was error in applying OP-TEE patch on debugging i got to know that CFG_IMX_TRUSTED_ARM_CE is not supported in i.MX91 from core/pta/imx/trusted_arm_ce.c&lt;BR /&gt;&lt;BR /&gt;#if defined(CFG_MX93)&lt;BR /&gt;#define OCRAM_START 0x20518000&lt;BR /&gt;#define OCRAM_END 0x2051C000&lt;BR /&gt;#elif defined(CFG_MX95)&lt;BR /&gt;#define OCRAM_START 0x204BC000&lt;BR /&gt;#define OCRAM_END 0x204C0000&lt;BR /&gt;#else&lt;BR /&gt;#error "Platform not supported"&lt;BR /&gt;#endif&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;So i want to know,&lt;/P&gt;&lt;P&gt;1. What is the importance of CFG_IMX_TRUSTED_ARM_CE ?&lt;BR /&gt;2. Why&amp;nbsp;CFG_IMX_TRUSTED_ARM_CE is supported for i.MX91?&lt;BR /&gt;3. Without using&amp;nbsp;CFG_IMX_TRUSTED_ARM_CE, how do i implement secure storage on i.MX91?&lt;BR /&gt;&lt;BR /&gt;Can someone guide me on this please?&lt;BR /&gt;&lt;BR /&gt;Thanks in advance!&lt;/P&gt;</description>
    <pubDate>Mon, 16 Jun 2025 05:59:17 GMT</pubDate>
    <dc:creator>Gunashree_MN</dc:creator>
    <dc:date>2025-06-16T05:59:17Z</dc:date>
    <item>
      <title>i.MX91 Secure Storage</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX91-Secure-Storage/m-p/2094638#M237090</link>
      <description>&lt;P class=""&gt;Hi Everyone,&lt;/P&gt;&lt;P class=""&gt;I am planning to implement secure storage on the i.MX91 platform. Could anyone please let me know the capacity of the EdgeLock Enclave memory?&lt;/P&gt;&lt;P class=""&gt;Additionally, I would appreciate it if you could share any reference documents or guidelines or procedure for implementing secure storage on the i.MX91 using the EdgeLock Enclave (ELE).&lt;/P&gt;&lt;P class=""&gt;Thanks in advance for your help!&lt;/P&gt;</description>
      <pubDate>Fri, 09 May 2025 13:20:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX91-Secure-Storage/m-p/2094638#M237090</guid>
      <dc:creator>Gunashree_MN</dc:creator>
      <dc:date>2025-05-09T13:20:25Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX91 Secure Storage</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX91-Secure-Storage/m-p/2094730#M237101</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;There are different sections of the memory map that can be secured, for more information related to this please take a look in table 4 in i.MX91 reference manual where it has TrustZone "Non-Secure (NS)" and "Secure (S)" world view of the system (Cortex-A) memory map. Access through the "Secure" memory region can only be performed by code with the appropriate security settings.&lt;/P&gt;
&lt;P&gt;For more guidelines related to security topics, please take a look in the next link:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.nxp.com/t5/i-MX-Security/i-MX-Security-Features-amp-Collateral/ta-p/1192496" target="_blank"&gt;i.MX Security Features &amp;amp; Collateral - NXP Community&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Best regards.&lt;/P&gt;</description>
      <pubDate>Fri, 09 May 2025 16:06:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX91-Secure-Storage/m-p/2094730#M237101</guid>
      <dc:creator>JorgeCas</dc:creator>
      <dc:date>2025-05-09T16:06:21Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX91 Secure Storage</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX91-Secure-Storage/m-p/2095211#M237113</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/203308"&gt;@JorgeCas&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks for your reply.&lt;/P&gt;&lt;P&gt;1. Can you please confirm if I have to follow the procedure mentioned in below guides to implement the secure storage in i.MX91&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;A href="https://www.nxp.com/docs/en/application-note/AN14105.pdf?_gl=1*1pnx2xb*_ga*MjQ0NTk1ODIzLjE3NDcwMjk2Mjc.*_ga_WM5LE0KMSH*czE3NDcwMjk2MjYkbzEkZzEkdDE3NDcwMzE5NTUkajAkbDAkaDA" target="_blank"&gt;https://www.nxp.com/docs/en/application-note/AN14105.pdf?_gl=1*1pnx2xb*_ga*MjQ0NTk1ODIzLjE3NDcwMjk2Mjc.*_ga_WM5LE0KMSH*czE3NDcwMjk2MjYkbzEkZzEkdDE3NDcwMzE5NTUkajAkbDAkaDA&lt;/A&gt;.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;A href="https://www.nxp.com/webapp/Download?colCode=AN12714&amp;amp;location=null&amp;amp;_gl=1*1l7r9cl*_ga*MjQ0NTk1ODIzLjE3NDcwMjk2Mjc.*_ga_WM5LE0KMSH*czE3NDcwMjk2MjYkbzEkZzEkdDE3NDcwMzIwMzAkajAkbDAkaDA" target="_blank"&gt;https://www.nxp.com/webapp/Download?colCode=AN12714&amp;amp;location=null&amp;amp;_gl=1*1l7r9cl*_ga*MjQ0NTk1ODIzLjE3NDcwMjk2Mjc.*_ga_WM5LE0KMSH*czE3NDcwMjk2MjYkbzEkZzEkdDE3NDcwMzIwMzAkajAkbDAkaDA&lt;/A&gt;.&lt;BR /&gt;&lt;BR /&gt;2. Capacity of ELE could be total size of&amp;nbsp;&lt;SPAN&gt;Secure (S) registers is it?&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 12 May 2025 06:45:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX91-Secure-Storage/m-p/2095211#M237113</guid>
      <dc:creator>Gunashree_MN</dc:creator>
      <dc:date>2025-05-12T06:45:35Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX91 Secure Storage</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX91-Secure-Storage/m-p/2095682#M237133</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;Q1&lt;/P&gt;
&lt;P&gt;The AN12714 used CAAM on i.MX8X series, but there is no CAAM on i.MX91. You can refer to HSM NVM storage &lt;A href="https://github.com/nxp-imx/imx-secure-enclave/blob/master/test/hsm/hsm_test.c" target="_blank"&gt;https://github.com/nxp-imx/imx-secure-enclave/blob/master/test/hsm/hsm_test.c&lt;/A&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;The hsm_data_storage() is used to store/retrieve data in HSM NVM. The data stored in NVM are encrypted with a key derived from the device. If user want to generate their own key and use this key to encrypt/sign the data, the hsm_enc_data_ops() API can be used, you can also find the test example enc_data_storage_test() in secure enclave library.&lt;/P&gt;
&lt;P&gt;All the keystores/data generated and stored in HSM NVM are in encrypted format, not only this API.&lt;/P&gt;
&lt;P&gt;Q2&lt;/P&gt;
&lt;P&gt;Yes, that is correct.&lt;/P&gt;
&lt;P&gt;Best regards.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 12 May 2025 17:54:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX91-Secure-Storage/m-p/2095682#M237133</guid>
      <dc:creator>JorgeCas</dc:creator>
      <dc:date>2025-05-12T17:54:22Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX91 Secure Storage</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX91-Secure-Storage/m-p/2096022#M237146</link>
      <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/203308"&gt;@JorgeCas&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P class=""&gt;Thank you for your inputs.&lt;/P&gt;&lt;P class=""&gt;I am planning to implement secure storage for a specific partition instead of encrypting the full disk.&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;&lt;P class=""&gt;To achieve this, I can use the APIs provided by ELE to generate encryption keys and encrypt the target partition. Is that correct?&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P class=""&gt;The keys generated using ELE are, by default, securely stored within ELE and must be accessed through its APIs. Is that correct?&lt;/P&gt;&lt;/LI&gt;&lt;/OL&gt;</description>
      <pubDate>Tue, 13 May 2025 03:31:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX91-Secure-Storage/m-p/2096022#M237146</guid>
      <dc:creator>Gunashree_MN</dc:creator>
      <dc:date>2025-05-13T03:31:40Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX91 Secure Storage</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX91-Secure-Storage/m-p/2096651#M237168</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;Yes, your understanding is correct.&lt;/P&gt;
&lt;P&gt;Best regards.&lt;/P&gt;</description>
      <pubDate>Tue, 13 May 2025 15:42:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX91-Secure-Storage/m-p/2096651#M237168</guid>
      <dc:creator>JorgeCas</dc:creator>
      <dc:date>2025-05-13T15:42:21Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX91 Secure Storage</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX91-Secure-Storage/m-p/2102626#M237495</link>
      <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/203308"&gt;@JorgeCas&lt;/a&gt;&amp;nbsp;&lt;BR /&gt;&lt;BR /&gt;Can you please share inputs on below questions.&lt;/P&gt;&lt;P&gt;1. Does the EdgeLock Enclave depends on OP-TEE to implement secure storage?&lt;/P&gt;&lt;P&gt;a. If yes, What is it's purpose?&lt;/P&gt;&lt;P&gt;b. If yes, Does it applicable to only secure storage? and processors having Edgelock enclave?&lt;/P&gt;&lt;P&gt;2. Is the OP-TEE mandatory to implement secure storage on iMX91?&lt;BR /&gt;3. Is it possible to implement the secure storage without using OP-TEE on i.MX 91?&lt;BR /&gt;&lt;BR /&gt;Thanks in advance&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 22 May 2025 10:20:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX91-Secure-Storage/m-p/2102626#M237495</guid>
      <dc:creator>Gunashree_MN</dc:creator>
      <dc:date>2025-05-22T10:20:26Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX91 Secure Storage</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX91-Secure-Storage/m-p/2116650#M238239</link>
      <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/61445"&gt;@nxp&lt;/a&gt;&lt;/P&gt;&lt;P&gt;I As I have mentioned in my previous mails. I am trying to implement secure storage on i.MX91 by encrypting a partition.&lt;BR /&gt;Below are the steps I am following to for the same.&lt;BR /&gt;&lt;BR /&gt;1. Enabled below features in OP-TEE&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;core/arch/arm/plat-imx/conf.mk&lt;/P&gt;&lt;P&gt;#CFG_IMX_TRUSTED_ARM_CE ?= y&lt;BR /&gt;CFG_HWRNG_QUALITY ?= 1024&lt;BR /&gt;CFG_WITH_SOFTWARE_PRNG ?= n&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&amp;nbsp;mk/config.mk&lt;/P&gt;&lt;P&gt;CFG_HWRNG_PTA ?= y&lt;BR /&gt;&lt;BR /&gt;2. Kernel features&lt;/P&gt;&lt;P&gt;CONFIG_DM_CRYPT=y&lt;BR /&gt;CONFIG_TRUSTED_KEYS=y&lt;BR /&gt;CONFIG_TRUSTED_KEYS_TEE=y&lt;BR /&gt;CONFIG_TEE_CRYPTO=y&lt;BR /&gt;CONFIG_BLK_DEV_DM=y&lt;BR /&gt;&lt;BR /&gt;3. Applied patches of above OP-TEE and kernel features in Yocto and built.&lt;/P&gt;&lt;P&gt;4. There was error in applying OP-TEE patch on debugging i got to know that CFG_IMX_TRUSTED_ARM_CE is not supported in i.MX91 from core/pta/imx/trusted_arm_ce.c&lt;BR /&gt;&lt;BR /&gt;#if defined(CFG_MX93)&lt;BR /&gt;#define OCRAM_START 0x20518000&lt;BR /&gt;#define OCRAM_END 0x2051C000&lt;BR /&gt;#elif defined(CFG_MX95)&lt;BR /&gt;#define OCRAM_START 0x204BC000&lt;BR /&gt;#define OCRAM_END 0x204C0000&lt;BR /&gt;#else&lt;BR /&gt;#error "Platform not supported"&lt;BR /&gt;#endif&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;So i want to know,&lt;/P&gt;&lt;P&gt;1. What is the importance of CFG_IMX_TRUSTED_ARM_CE ?&lt;BR /&gt;2. Why&amp;nbsp;CFG_IMX_TRUSTED_ARM_CE is supported for i.MX91?&lt;BR /&gt;3. Without using&amp;nbsp;CFG_IMX_TRUSTED_ARM_CE, how do i implement secure storage on i.MX91?&lt;BR /&gt;&lt;BR /&gt;Can someone guide me on this please?&lt;BR /&gt;&lt;BR /&gt;Thanks in advance!&lt;/P&gt;</description>
      <pubDate>Mon, 16 Jun 2025 05:59:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX91-Secure-Storage/m-p/2116650#M238239</guid>
      <dc:creator>Gunashree_MN</dc:creator>
      <dc:date>2025-06-16T05:59:17Z</dc:date>
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