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    <title>i.MX ProcessorsのトピックRe: Confirm about i.MX6 ASRC.</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Confirm-about-i-MX6-ASRC/m-p/254049#M23810</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;1) Is my understanding correct?&lt;/P&gt;&lt;P&gt;A1. The main function of ARSC is Converting the sampling rate of a signal associated&amp;nbsp; to an input clock into a signal associated to a different output clock. Clocks shall be physically available e.g. Different clock sources, with different dividers &lt;/P&gt;&lt;P&gt;SSI/ESAI&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; --- normally divide 64 &lt;/P&gt;&lt;P&gt;SPDIF(Rx)&amp;nbsp;&amp;nbsp;&amp;nbsp; --- normally divide 128&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;[Q2]Please see Table 15-7.I want to confirm correspondence between "Fsin, Fsout" in this table and "input clock, output clock" in Figure 15-4.Could you let me know it?&lt;/P&gt;&lt;P&gt;A2.Those values are&amp;nbsp; flowing through different processing branches and different setups of the pre-filter,&lt;/P&gt;&lt;P&gt;That ASRC can be used to handle different rate conversion requirements.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;[Q3]Please see ATSC bit in chapter 15.7.1.Could you let me know how ASRC decide a sampling rate for input / output if ATSC is set?&lt;/P&gt;&lt;P&gt;A3. In case the &lt;SPAN style="color: black; background-color: #ffffff; font-family: 'Lucida Grande', Arial, Helvetica, sans-serif; white-space: pre; font-size: 10pt; line-height: 1.5em;"&gt;ATSA,ATSB,ATSC bit of ASRCTR is enabled, the pre/post filter settings are determined automatically&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Hope it helps&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 05 Feb 2014 16:38:37 GMT</pubDate>
    <dc:creator>Bio_TICFSL</dc:creator>
    <dc:date>2014-02-05T16:38:37Z</dc:date>
    <item>
      <title>Confirm about i.MX6 ASRC.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Confirm-about-i-MX6-ASRC/m-p/254048#M23809</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi community,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I want to confirm about i.MX6 ASRC.&lt;/P&gt;&lt;P&gt;Please my questions below.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;[Q1]&lt;/P&gt;&lt;P&gt;Please see Figure 15-4 in IMX6SDLRM (Rev.1).&lt;/P&gt;&lt;P&gt;There are input clock A, B, C and output clock A, B, C.&lt;/P&gt;&lt;P&gt;I understand these input clocks are the sampling rate for audio data from external device.&lt;/P&gt;&lt;P&gt;And these output clocks are the sampling rate for audio data to external device.&lt;/P&gt;&lt;P&gt;Is my understanding correct?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;[Q2]&lt;/P&gt;&lt;P&gt;Please see Table 15-7.&lt;/P&gt;&lt;P&gt;I want to confirm correspondence between "Fsin, Fsout" in this table and "input clock, output clock" in Figure 15-4.&lt;/P&gt;&lt;P&gt;Could you let me know it?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;[Q3]&lt;/P&gt;&lt;P&gt;Please see ATSC bit in chapter 15.7.1.&lt;/P&gt;&lt;P&gt;Could you let me know how ASRC decide a sampling rate for input / output if ATSC is set?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Satoshi Shimoda&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 24 Jan 2014 01:31:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Confirm-about-i-MX6-ASRC/m-p/254048#M23809</guid>
      <dc:creator>satoshishimoda</dc:creator>
      <dc:date>2014-01-24T01:31:55Z</dc:date>
    </item>
    <item>
      <title>Re: Confirm about i.MX6 ASRC.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Confirm-about-i-MX6-ASRC/m-p/254049#M23810</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;1) Is my understanding correct?&lt;/P&gt;&lt;P&gt;A1. The main function of ARSC is Converting the sampling rate of a signal associated&amp;nbsp; to an input clock into a signal associated to a different output clock. Clocks shall be physically available e.g. Different clock sources, with different dividers &lt;/P&gt;&lt;P&gt;SSI/ESAI&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; --- normally divide 64 &lt;/P&gt;&lt;P&gt;SPDIF(Rx)&amp;nbsp;&amp;nbsp;&amp;nbsp; --- normally divide 128&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;[Q2]Please see Table 15-7.I want to confirm correspondence between "Fsin, Fsout" in this table and "input clock, output clock" in Figure 15-4.Could you let me know it?&lt;/P&gt;&lt;P&gt;A2.Those values are&amp;nbsp; flowing through different processing branches and different setups of the pre-filter,&lt;/P&gt;&lt;P&gt;That ASRC can be used to handle different rate conversion requirements.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;[Q3]Please see ATSC bit in chapter 15.7.1.Could you let me know how ASRC decide a sampling rate for input / output if ATSC is set?&lt;/P&gt;&lt;P&gt;A3. In case the &lt;SPAN style="color: black; background-color: #ffffff; font-family: 'Lucida Grande', Arial, Helvetica, sans-serif; white-space: pre; font-size: 10pt; line-height: 1.5em;"&gt;ATSA,ATSB,ATSC bit of ASRCTR is enabled, the pre/post filter settings are determined automatically&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Hope it helps&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 05 Feb 2014 16:38:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Confirm-about-i-MX6-ASRC/m-p/254049#M23810</guid>
      <dc:creator>Bio_TICFSL</dc:creator>
      <dc:date>2014-02-05T16:38:37Z</dc:date>
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