<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: Disabling JTAG Interface on Custom i.MX6Q Hardware in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Disabling-JTAG-Interface-on-Custom-i-MX6Q-Hardware/m-p/2110814#M237915</link>
    <description>&lt;P&gt;Could you tell me which version BSP are you using? And how about your JTAG design in your board , can you share the schematic to us? Thanks&lt;/P&gt;</description>
    <pubDate>Thu, 05 Jun 2025 02:36:55 GMT</pubDate>
    <dc:creator>Rita_Wang</dc:creator>
    <dc:date>2025-06-05T02:36:55Z</dc:date>
    <item>
      <title>Disabling JTAG Interface on Custom i.MX6Q Hardware</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Disabling-JTAG-Interface-on-Custom-i-MX6Q-Hardware/m-p/2107739#M237787</link>
      <description>&lt;P&gt;Hi NXP Community,&lt;/P&gt;&lt;P&gt;I am attempting to disable the &lt;STRONG&gt;JTAG&lt;/STRONG&gt; interface on the &lt;STRONG&gt;i.MX6Q&lt;/STRONG&gt; processor. According to the reference manual, the JTAG signals—&lt;EM&gt;JTAG_MOD&lt;/EM&gt;, &lt;EM&gt;JTAG_TCK&lt;/EM&gt;, &lt;EM&gt;JTAG_TMS&lt;/EM&gt;, &lt;EM&gt;JTAG_TDI&lt;/EM&gt;, and &lt;EM&gt;JTAG_TDO&lt;/EM&gt;—do not support pin multiplexing. However, the &lt;EM&gt;JTAG_DE_B&lt;/EM&gt; signal does support muxing and can be configured through the Pad Mux Register at &lt;EM&gt;IOMUXC_SW_MUX_CTL_PAD_GPIO16&lt;/EM&gt;. This is also reflected in the &lt;EM&gt;imx6q-pinfunc.h&lt;/EM&gt; file.&lt;/P&gt;&lt;P&gt;I would like to confirm whether it is possible to disable the JTAG interface by repurposing the &lt;EM&gt;JTAG_DE_B&lt;/EM&gt; pin through pin multiplexing—for example, by switching its MUX mode from ALT7 (&lt;EM&gt;JTAG_DE_B&lt;/EM&gt;) to ALT5 (&lt;EM&gt;GPIO7_IO11&lt;/EM&gt;).&lt;/P&gt;</description>
      <pubDate>Fri, 30 May 2025 07:06:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Disabling-JTAG-Interface-on-Custom-i-MX6Q-Hardware/m-p/2107739#M237787</guid>
      <dc:creator>Divyansh_Rai</dc:creator>
      <dc:date>2025-05-30T07:06:51Z</dc:date>
    </item>
    <item>
      <title>Re: Disabling JTAG Interface on Custom i.MX6Q Hardware</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Disabling-JTAG-Interface-on-Custom-i-MX6Q-Hardware/m-p/2110221#M237881</link>
      <description>&lt;DIV data-slate-node="element"&gt;&lt;SPAN data-slate-node="text"&gt;&lt;SPAN class="null" data-slate-leaf="true" data-sent-id="KY5LmnM2wr"&gt;This method does not disable the JTAG hardware itself—it only prevents it from being enabled via the JTAG_DE_B signal.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV data-slate-node="element"&gt;&lt;SPAN data-slate-node="text"&gt;&lt;SPAN class="null" data-slate-leaf="true" data-sent-id="NOAVg2Q957"&gt;For stronger security, consider:&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;UL&gt;
&lt;LI data-slate-node="element"&gt;&lt;SPAN data-slate-node="text"&gt;&lt;SPAN class="null" data-slate-leaf="true" data-sent-id="WZq04LYyqn"&gt;Blowing the SJC_DISABLE fuse (irreversible).&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/LI&gt;
&lt;LI data-slate-node="element"&gt;&lt;SPAN data-slate-node="text"&gt;&lt;SPAN class="null" data-slate-leaf="true" data-sent-id="z6qGGvpkqP"&gt;Leaving JTAG pins unconnected on your board.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/LI&gt;
&lt;LI data-slate-node="element" data-slate-fragment="JTVCJTdCJTIydHlwZSUyMiUzQSUyMnBhcmFncmFwaCUyMiUyQyUyMmNoaWxkcmVuJTIyJTNBJTVCJTdCJTIyaWQlMjIlM0ElMjJLWTVMbW5NMndyJTIyJTJDJTIycGFyYUlkeCUyMiUzQTAlMkMlMjJzcmMlMjIlM0ElMjJUaGlzJTIwbWV0aG9kJTIwZG9lcyUyMG5vdCUyMGRpc2FibGUlMjB0aGUlMjBKVEFHJTIwaGFyZHdhcmUlMjBpdHNlbGYlRTIlODAlOTRpdCUyMG9ubHklMjBwcmV2ZW50cyUyMGl0JTIwZnJvbSUyMGJlaW5nJTIwZW5hYmxlZCUyMHZpYSUyMHRoZSUyMEpUQUdfREVfQiUyMHNpZ25hbC4lMjIlMkMlMjJkc3QlMjIlM0ElMjIlRTYlQUQlQTQlRTYlOTYlQjklRTYlQjMlOTUlRTQlQjglOEQlRTQlQkMlOUElRTclQTYlODElRTclOTQlQThKVEFHJUU3JUExJUFDJUU0JUJCJUI2JUU2JTlDJUFDJUU4JUJBJUFCJUVGJUJDJThDJUU1JUFFJTgzJUU1JThGJUFBJUU0JUJDJTlBJUU5JTk4JUJCJUU2JUFEJUEyJUU5JTgwJTlBJUU4JUJGJTg3SlRBR19ERV9CJUU0JUJGJUExJUU1JThGJUI3JUU1JTkwJUFGJUU3JTk0JUE4SlRBRyVFNyVBMSVBQyVFNCVCQiVCNiVFMyU4MCU4MiUyMiUyQyUyMm1ldGFkYXRhJTIyJTNBJTIyJTIyJTJDJTIybWF0Y2hlcyUyMiUzQW51bGwlMkMlMjJtZXRhRGF0YSUyMiUzQSU1QiU1RCUyQyUyMnRleHQlMjIlM0ElMjJUaGlzJTIwbWV0aG9kJTIwZG9lcyUyMG5vdCUyMGRpc2FibGUlMjB0aGUlMjBKVEFHJTIwaGFyZHdhcmUlMjBpdHNlbGYlRTIlODAlOTRpdCUyMG9ubHklMjBwcmV2ZW50cyUyMGl0JTIwZnJvbSUyMGJlaW5nJTIwZW5hYmxlZCUyMHZpYSUyMHRoZSUyMEpUQUdfREVfQiUyMHNpZ25hbC4lMjIlN0QlNUQlN0QlMkMlN0IlMjJ0eXBlJTIyJTNBJTIycGFyYWdyYXBoJTIyJTJDJTIyY2hpbGRyZW4lMjIlM0ElNUIlN0IlMjJpZCUyMiUzQSUyMk5PQVZnMlE5NTclMjIlMkMlMjJwYXJhSWR4JTIyJTNBMSUyQyUyMnNyYyUyMiUzQSUyMkZvciUyMHN0cm9uZ2VyJTIwc2VjdXJpdHklMkMlMjBjb25zaWRlciUzQSUyMiUyQyUyMmRzdCUyMiUzQSUyMiVFNCVCOCVCQSVFNCVCQSU4NiVFNSVBMiU5RSVFNSVCQyVCQSVFNSVBRSU4OSVFNSU4NSVBOCVFNiU4MCVBNyVFRiVCQyU4QyVFOCVBRiVCNyVFOCU4MCU4MyVFOCU5OSU5MSVFRiVCQyU5QSUyMiUyQyUyMm1ldGFkYXRhJTIyJTNBJTIyJTIyJTJDJTIybWF0Y2hlcyUyMiUzQW51bGwlMkMlMjJtZXRhRGF0YSUyMiUzQSU1QiU1RCUyQyUyMnRleHQlMjIlM0ElMjJGb3IlMjBzdHJvbmdlciUyMHNlY3VyaXR5JTJDJTIwY29uc2lkZXIlM0ElMjIlN0QlNUQlN0QlMkMlN0IlMjJ0eXBlJTIyJTNBJTIycGFyYWdyYXBoJTIyJTJDJTIyY2hpbGRyZW4lMjIlM0ElNUIlN0IlMjJpZCUyMiUzQSUyMldacTA0TFl5cW4lMjIlMkMlMjJwYXJhSWR4JTIyJTNBMiUyQyUyMnNyYyUyMiUzQSUyMkJsb3dpbmclMjB0aGUlMjBTSkNfRElTQUJMRSUyMGZ1c2UlMjAoaXJyZXZlcnNpYmxlKS4lMjIlMkMlMjJkc3QlMjIlM0ElMjJTSkNfRElTQUJMRSVFNCVCRiU5RCVFOSU5OSVBOSVFNCVCOCU5RCVFNyU4NiU5NCVFNiU5NiVBRCVFRiVCQyU4OCVFNCVCOCU4RCVFNSU4RiVBRiVFOSU4MCU4NiVFRiVCQyU4OSVFMyU4MCU4MiUyMiUyQyUyMm1ldGFkYXRhJTIyJTNBJTIyJTIyJTJDJTIybWF0Y2hlcyUyMiUzQW51bGwlMkMlMjJtZXRhRGF0YSUyMiUzQSU1QiU1RCUyQyUyMnRleHQlMjIlM0ElMjJCbG93aW5nJTIwdGhlJTIwU0pDX0RJU0FCTEUlMjBmdXNlJTIwKGlycmV2ZXJzaWJsZSkuJTIyJTdEJTVEJTdEJTJDJTdCJTIydHlwZSUyMiUzQSUyMnBhcmFncmFwaCUyMiUyQyUyMmNoaWxkcmVuJTIyJTNBJTVCJTdCJTIyaWQlMjIlM0ElMjJ6NnFHR3Zwa3FQJTIyJTJDJTIycGFyYUlkeCUyMiUzQTMlMkMlMjJzcmMlMjIlM0ElMjJMZWF2aW5nJTIwSlRBRyUyMHBpbnMlMjB1bmNvbm5lY3RlZCUyMG9uJTIweW91ciUyMGJvYXJkLiUyMiUyQyUyMmRzdCUyMiUzQSUyMiVFOCVBRSVBOUpUQUclRTUlQkMlOTUlRTglODQlOUElRTUlOUMlQTglRTYlOUQlQkYlRTQlQjglOEElRTQlQkYlOUQlRTYlOEMlODElRTYlOUMlQUElRTglQkYlOUUlRTYlOEUlQTUlRTclOEElQjYlRTYlODAlODElRTMlODAlODIlMjIlMkMlMjJtZXRhZGF0YSUyMiUzQSUyMiUyMiUyQyUyMm1hdGNoZXMlMjIlM0FudWxsJTJDJTIybWV0YURhdGElMjIlM0ElNUIlNUQlMkMlMjJ0ZXh0JTIyJTNBJTIyTGVhdmluZyUyMEpUQUclMjBwaW5zJTIwdW5jb25uZWN0ZWQlMjBvbiUyMHlvdXIlMjBib2FyZC4lMjIlN0QlNUQlN0QlMkMlN0IlMjJ0eXBlJTIyJTNBJTIycGFyYWdyYXBoJTIyJTJDJTIyY2hpbGRyZW4lMjIlM0ElNUIlN0IlMjJpZCUyMiUzQSUyMjBRQTNrRzc4QXolMjIlMkMlMjJwYXJhSWR4JTIyJTNBNCUyQyUyMnNyYyUyMiUzQSUyMlVzaW5nJTIwc2VjdXJlJTIwYm9vdCUyMHRvJTIwcHJldmVudCUyMHVuYXV0aG9yaXplZCUyMGNvZGUlMjBleGVjdXRpb24uJTIyJTJDJTIyZHN0JTIyJTNBJTIyJUU0JUJEJUJGJUU3JTk0JUE4JUU1JUFFJTg5JUU1JTg1JUE4JUU1JUJDJTk1JUU1JUFGJUJDJUU2JTlEJUE1JUU5JTk4JUIyJUU2JUFEJUEyJUU2JTlDJUFBJUU3JUJCJThGJUU2JThFJTg4JUU2JTlEJTgzJUU3JTlBJTg0JUU0JUJCJUEzJUU3JUEwJTgxJUU2JTg5JUE3JUU4JUExJThDJUUzJTgwJTgyJTIyJTJDJTIybWV0YWRhdGElMjIlM0ElMjIlMjIlMkMlMjJtYXRjaGVzJTIyJTNBbnVsbCUyQyUyMm1ldGFEYXRhJTIyJTNBJTVCJTVEJTJDJTIydGV4dCUyMiUzQSUyMlVzaW5nJTIwc2VjdXJlJTIwYm9vdCUyMHRvJTIwcHJldmVudCUyMHVuYXV0aG9yaXplZCUyMGNvZGUlMjBleGVjdXRpb24uJTIyJTdEJTVEJTdEJTVE"&gt;&lt;SPAN data-slate-node="text"&gt;&lt;SPAN class="null" data-slate-leaf="true" data-sent-id="0QA3kG78Az"&gt;Using secure boot to prevent unauthorized code execution.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/LI&gt;
&lt;/UL&gt;</description>
      <pubDate>Wed, 04 Jun 2025 08:23:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Disabling-JTAG-Interface-on-Custom-i-MX6Q-Hardware/m-p/2110221#M237881</guid>
      <dc:creator>Rita_Wang</dc:creator>
      <dc:date>2025-06-04T08:23:25Z</dc:date>
    </item>
    <item>
      <title>Re: Disabling JTAG Interface on Custom i.MX6Q Hardware</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Disabling-JTAG-Interface-on-Custom-i-MX6Q-Hardware/m-p/2110352#M237889</link>
      <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/57740"&gt;@Rita_Wang&lt;/a&gt;,&lt;/P&gt;&lt;P&gt;Thank you for your prompt and helpful response.&lt;/P&gt;&lt;P&gt;As disabling JTAG via Secure JTAG (Blowing the SJC_DISABLE fuse) is an irreversible action, I’m exploring a less permanent, software-based approach. My intention is to weaken the electrical drive strength or alter the pad settings of the core JTAG signals to make external access more difficult.&lt;/P&gt;&lt;P&gt;To achieve this, I defined the relevant JTAG pin macros in the imx6q-pinfunc.h header like below:&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;#define MX6QDL_PAD_JTAG_TMS__JTAG_TMS	  0x000 0x678 0x000 0x0 0x0
#define MX6QDL_PAD_JTAG_MOD__JTAG_MOD	  0x000 0x67C 0x000 0x0 0x0
#define MX6QDL_PAD_JTAG_TRSTB__JTAG_TRSTB 0x000 0x680 0x000 0x0 0x0
#define MX6QDL_PAD_JTAG_TDI__JTAG_TDI	  0x000 0x684 0x000 0x0 0x0
#define MX6QDL_PAD_JTAG_TCK__JTAG_TCK	  0x000 0x688 0x000 0x0 0x0
#define MX6QDL_PAD_JTAG_TDO__JTAG_TDO	  0x000 0x68C 0x000 0x0 0x0&lt;/LI-CODE&gt;&lt;P&gt;and modified the Pad Control Register settings via the imx6q-horizon.dtsi device tree file like below:&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;fsl,pins = &amp;lt;
            MX6QDL_PAD_JTAG_TMS__JTAG_TMS      0x00002060
            MX6QDL_PAD_JTAG_MOD__JTAG_MOD      0x00002060
            MX6QDL_PAD_JTAG_TRSTB__JTAG_TRSTB  0x00002060
            MX6QDL_PAD_JTAG_TDI__JTAG_TDI      0x00002060
            MX6QDL_PAD_JTAG_TCK__JTAG_TCK      0x00002060
            MX6QDL_PAD_JTAG_TDO__JTAG_TDO      0x000080B1
        &amp;gt;;&lt;/LI-CODE&gt;&lt;P&gt;However, after applying these changes, the board fails to boot and hangs at the &lt;STRONG&gt;"Starting kernel ..."&lt;/STRONG&gt; log message.&lt;/P&gt;&lt;P&gt;Could you provide any insight into what might be causing this hang? Is it possible that altering pad control settings of non-muxable JTAG pins is interfering with early kernel or SoC initialization?&lt;/P&gt;&lt;P&gt;Thanks again for your guidance.&lt;/P&gt;</description>
      <pubDate>Wed, 04 Jun 2025 10:24:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Disabling-JTAG-Interface-on-Custom-i-MX6Q-Hardware/m-p/2110352#M237889</guid>
      <dc:creator>Divyansh_Rai</dc:creator>
      <dc:date>2025-06-04T10:24:46Z</dc:date>
    </item>
    <item>
      <title>Re: Disabling JTAG Interface on Custom i.MX6Q Hardware</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Disabling-JTAG-Interface-on-Custom-i-MX6Q-Hardware/m-p/2110814#M237915</link>
      <description>&lt;P&gt;Could you tell me which version BSP are you using? And how about your JTAG design in your board , can you share the schematic to us? Thanks&lt;/P&gt;</description>
      <pubDate>Thu, 05 Jun 2025 02:36:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Disabling-JTAG-Interface-on-Custom-i-MX6Q-Hardware/m-p/2110814#M237915</guid>
      <dc:creator>Rita_Wang</dc:creator>
      <dc:date>2025-06-05T02:36:55Z</dc:date>
    </item>
    <item>
      <title>Re: Disabling JTAG Interface on Custom i.MX6Q Hardware</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Disabling-JTAG-Interface-on-Custom-i-MX6Q-Hardware/m-p/2111981#M237958</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/57740"&gt;@Rita_Wang&lt;/a&gt;,&lt;/P&gt;&lt;P&gt;The issue is resolved now. I am able to write the JTAG Pad Ctrl registers from the u-boot using md/mw command and also I have made those changes in the u-boot source code in the &lt;EM&gt;mx6_horizon.c&lt;/EM&gt; file as below:&lt;/P&gt;&lt;LI-CODE lang="c"&gt;writel(0x3060, (void *)0x20E0678);	// JTAG_TMS
writel(0x3060, (void *)0x20E067C);	// JTAG_MOD
writel(0x3060, (void *)0x20E0680);	// JTAG_TRSTB
writel(0x3060, (void *)0x20E0684);	// JTAG_TDI
writel(0x3060, (void *)0x20E0688);	// JTAG_TCK
writel(0x80B1, (void *)0x20E068C);	// JTAG_TDO&lt;/LI-CODE&gt;&lt;P&gt;Thank you for the support.&lt;/P&gt;</description>
      <pubDate>Fri, 06 Jun 2025 09:38:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Disabling-JTAG-Interface-on-Custom-i-MX6Q-Hardware/m-p/2111981#M237958</guid>
      <dc:creator>Divyansh_Rai</dc:creator>
      <dc:date>2025-06-06T09:38:38Z</dc:date>
    </item>
    <item>
      <title>Re: Disabling JTAG Interface on Custom i.MX6Q Hardware</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Disabling-JTAG-Interface-on-Custom-i-MX6Q-Hardware/m-p/2112499#M237991</link>
      <description>&lt;P&gt;Dear&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/251054"&gt;@Divyansh_Rai&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;Good job! Thanks a lot for your kindly sharing.&lt;/P&gt;
&lt;P&gt;Wish you have a nice day&lt;/P&gt;
&lt;P&gt;Best Reagrds&lt;/P&gt;
&lt;P&gt;Rita&lt;/P&gt;</description>
      <pubDate>Mon, 09 Jun 2025 03:38:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Disabling-JTAG-Interface-on-Custom-i-MX6Q-Hardware/m-p/2112499#M237991</guid>
      <dc:creator>Rita_Wang</dc:creator>
      <dc:date>2025-06-09T03:38:18Z</dc:date>
    </item>
  </channel>
</rss>

