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    <title>topic Re: iMX8M Plus PCIe Reference CLK Impedance in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/iMX8M-Plus-PCIe-Reference-CLK-Impedance/m-p/2104907#M237653</link>
    <description>&lt;P&gt;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/204495"&gt;@June_Lu&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp; The project name is iMX8M Plus SOM, application : HMI&lt;/P&gt;</description>
    <pubDate>Tue, 27 May 2025 06:37:32 GMT</pubDate>
    <dc:creator>Zhirong_Yang</dc:creator>
    <dc:date>2025-05-27T06:37:32Z</dc:date>
    <item>
      <title>iMX8M Plus PCIe Reference CLK Impedance</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX8M-Plus-PCIe-Reference-CLK-Impedance/m-p/2104170#M237580</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&amp;nbsp; In iMX.8M Plus Hardware Developer's Guide Rev .0, the PCIe reference clock impedance is 85 ohm as below:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Zhirong_Yang_0-1748243492155.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/339622iE44405E3354B2EF0/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Zhirong_Yang_0-1748243492155.png" alt="Zhirong_Yang_0-1748243492155.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Rev .1 PCIe CLK impedance change to 100ohm, and add 'PCIe reference clocks must&lt;BR /&gt;be routed in 100 Ω differential' comment.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Zhirong_Yang_1-1748243554337.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/339624iAF8ABAA877549176/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Zhirong_Yang_1-1748243554337.png" alt="Zhirong_Yang_1-1748243554337.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Rev .1.1 still remain 100 ohm, but seems remove the comment 'PCIe reference clocks must&lt;BR /&gt;be routed in 100 Ω differential'.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Zhirong_Yang_2-1748243667844.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/339626i5FE41180D6BD389E/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Zhirong_Yang_2-1748243667844.png" alt="Zhirong_Yang_2-1748243667844.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;My question is:&lt;/P&gt;&lt;P&gt;1. Why NXP change PCIe Reference CLK to 100ohm from 85ohm?&lt;/P&gt;&lt;P&gt;2. Is PCIe CLK 100 ohm must or not?&lt;/P&gt;&lt;P&gt;3. What's the risk if we route PCIe CLK 85ohm?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 26 May 2025 07:18:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX8M-Plus-PCIe-Reference-CLK-Impedance/m-p/2104170#M237580</guid>
      <dc:creator>Zhirong_Yang</dc:creator>
      <dc:date>2025-05-26T07:18:06Z</dc:date>
    </item>
    <item>
      <title>Re: iMX8M Plus PCIe Reference CLK Impedance</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX8M-Plus-PCIe-Reference-CLK-Impedance/m-p/2104762#M237638</link>
      <description>&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;" lang="en-US"&gt;Would you kindly share your project information?&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;" lang="en-US"&gt;Thanks&lt;/P&gt;</description>
      <pubDate>Tue, 27 May 2025 03:30:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX8M-Plus-PCIe-Reference-CLK-Impedance/m-p/2104762#M237638</guid>
      <dc:creator>June_Lu</dc:creator>
      <dc:date>2025-05-27T03:30:23Z</dc:date>
    </item>
    <item>
      <title>Re: iMX8M Plus PCIe Reference CLK Impedance</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX8M-Plus-PCIe-Reference-CLK-Impedance/m-p/2104781#M237640</link>
      <description>&lt;P&gt;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/204495"&gt;@June_Lu&lt;/a&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp;iMX8M Plus is our one of mainstream chips, some of projects have already been mass production.&lt;/P&gt;&lt;P&gt;&amp;nbsp; So we urgent need to know:&amp;nbsp;&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;Why NXP change iMX8M Plus PCIe Reference CLK to 100ohm from 85ohm?&lt;/LI&gt;&lt;LI&gt;Is PCIe CLK 100 ohm must or not?&lt;/LI&gt;&lt;LI&gt;What's the risk if we route PCIe CLK 85ohm?&lt;/LI&gt;&lt;LI&gt;Do we need to make the 100 ohm CLK change to our mass production projects?&lt;/LI&gt;&lt;/OL&gt;</description>
      <pubDate>Tue, 27 May 2025 04:10:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX8M-Plus-PCIe-Reference-CLK-Impedance/m-p/2104781#M237640</guid>
      <dc:creator>Zhirong_Yang</dc:creator>
      <dc:date>2025-05-27T04:10:23Z</dc:date>
    </item>
    <item>
      <title>Re: iMX8M Plus PCIe Reference CLK Impedance</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX8M-Plus-PCIe-Reference-CLK-Impedance/m-p/2104787#M237643</link>
      <description>&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;" lang="en-US"&gt;Will check it, but please send the information of project name, application field.&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;" lang="en-US"&gt;Thanks&lt;/P&gt;</description>
      <pubDate>Tue, 27 May 2025 04:15:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX8M-Plus-PCIe-Reference-CLK-Impedance/m-p/2104787#M237643</guid>
      <dc:creator>June_Lu</dc:creator>
      <dc:date>2025-05-27T04:15:18Z</dc:date>
    </item>
    <item>
      <title>Re: iMX8M Plus PCIe Reference CLK Impedance</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX8M-Plus-PCIe-Reference-CLK-Impedance/m-p/2104907#M237653</link>
      <description>&lt;P&gt;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/204495"&gt;@June_Lu&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp; The project name is iMX8M Plus SOM, application : HMI&lt;/P&gt;</description>
      <pubDate>Tue, 27 May 2025 06:37:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX8M-Plus-PCIe-Reference-CLK-Impedance/m-p/2104907#M237653</guid>
      <dc:creator>Zhirong_Yang</dc:creator>
      <dc:date>2025-05-27T06:37:32Z</dc:date>
    </item>
    <item>
      <title>Re: iMX8M Plus PCIe Reference CLK Impedance</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX8M-Plus-PCIe-Reference-CLK-Impedance/m-p/2105645#M237702</link>
      <description>&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;" lang="en-US"&gt;This impedance of 85ohm or 100ohm does not affect much for reference CLK, on the EVK it is 85ohm.&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;" lang="en-US"&gt;And the PCIe CLK 100 ohm is not mandatory, either 85ohm or 100ohm is actually OK.&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;" lang="en-US"&gt;HDG will be updated, such as add a note either 85ohm or 100ohm is OK.&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;" lang="en-US"&gt;Thanks&lt;/P&gt;</description>
      <pubDate>Wed, 28 May 2025 01:46:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX8M-Plus-PCIe-Reference-CLK-Impedance/m-p/2105645#M237702</guid>
      <dc:creator>June_Lu</dc:creator>
      <dc:date>2025-05-28T01:46:26Z</dc:date>
    </item>
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