<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>i.MX Processors中的主题 Re: Kernel panic problem when switching from MCIMX7U3DVK07SC to MCIMX7U3DVK07SD chip (Rev B1 to B2))</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Kernel-panic-problem-when-switching-from-MCIMX7U3DVK07SC-to/m-p/2089040#M236795</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/57740"&gt;@Rita_Wang&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;&lt;P&gt;Right now I figured it out,&lt;/P&gt;&lt;P&gt;meta-imx layer is&amp;nbsp;&lt;SPAN&gt;5.15.52-2.1.0,&amp;nbsp; with srcrev =&amp;nbsp;36363d8623ba60858e2632b7d2b70dae932c9a8b&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;But they made a custom layer on top of it, and customized the 5.15.52-2.1.0 version.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Sorry for confusion.&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;Burak&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Tue, 29 Apr 2025 07:16:50 GMT</pubDate>
    <dc:creator>budulger</dc:creator>
    <dc:date>2025-04-29T07:16:50Z</dc:date>
    <item>
      <title>Kernel panic problem when switching from MCIMX7U3DVK07SC to MCIMX7U3DVK07SD chip (Rev B1 to B2))</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Kernel-panic-problem-when-switching-from-MCIMX7U3DVK07SC-to/m-p/2087836#M236743</link>
      <description>&lt;P&gt;Hi all,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;We are having kernel panic problem in our production after changing the processor revision for IMX7ULP processors from MCIMX7U3DVK07SC to MCIMX7U3DVK07SD (revision B1 to B2).&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Kernel panic - not syncing: Attempted to kill init! exitcode=0x00000007 Kernel panic - not syncing: No working init found. Try passing init= option to kernel.&lt;/P&gt;&lt;P&gt;We are using the same uboot and image for the production, we were not passing the init= parameter to the bootargs before, could it related to it? or there is another problem when changing from different revisions?&lt;/P&gt;&lt;P&gt;We are pointing to a source code of uboot dated around 20 May 2022, should we make any update for the uboot? (&lt;A href="https://source.denx.de/u-boot/u-boot/)" target="_blank" rel="noopener"&gt;https://source.denx.de/u-boot/u-boot/)&lt;/A&gt;&lt;/P&gt;&lt;P&gt;I didn't encounter any change related to revision and when I examined the silicon revision document from B1 to B2, also it claims there should not be any software or hardware differences?&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;A href="https://www.nxp.com/docs/en/engineering-bulletin/EB00911.pdf" target="_blank" rel="noopener"&gt;https://www.nxp.com/docs/en/engineering-bulletin/EB00911.pdf&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Could it be related to mask set errata?&amp;nbsp;&amp;nbsp;&lt;A href="https://www.nxp.com/docs/en/errata/IMX7ULPCE.pdf" target="_blank" rel="noopener"&gt;https://www.nxp.com/docs/en/errata/IMX7ULPCE.pdf&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="https://www.nxp.com/docs/en/errata/IMX7ULP_2N54W.pdf" target="_blank" rel="noopener"&gt;https://www.nxp.com/docs/en/errata/IMX7ULP_2N54W.pdf&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Can you help me to solve the problem? I can provide more information if needed.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;Burak&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 28 Apr 2025 00:25:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Kernel-panic-problem-when-switching-from-MCIMX7U3DVK07SC-to/m-p/2087836#M236743</guid>
      <dc:creator>budulger</dc:creator>
      <dc:date>2025-04-28T00:25:05Z</dc:date>
    </item>
    <item>
      <title>Re: Kernel panic problem when switching from MCIMX7U3DVK07SC to MCIMX7U3DVK07SD chip (Rev B1 to B2))</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Kernel-panic-problem-when-switching-from-MCIMX7U3DVK07SC-to/m-p/2087905#M236745</link>
      <description>&lt;P&gt;Dear&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/249876"&gt;@budulger&lt;/a&gt;&amp;nbsp;，&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;You mean here:"We are having kernel panic problem in our production after changing the processor revision for IMX7ULP processors from MCIMX7U3DVK07SC to MCIMX7U3DVK07SD (revision B1 to B2)."&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Q: Which version BSP we supply are you using?&amp;nbsp;&lt;A href="https://www.nxp.com/design/design-center/software/embedded-software/i-mx-software/embedded-linux-for-i-mx-applications-processors:IMXLINUX" target="_blank"&gt;Embedded Linux for i.MX Applications Processors | NXP Semiconductors&lt;/A&gt;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;For this two version chip, are you using the same code, do not changing anything?&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Could you share the full log for both board with these two chips running?&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;We need the details to find the root cause as soon as possible. Thanks&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Wish you have a nice day&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Best Regards&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Rita&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 28 Apr 2025 03:12:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Kernel-panic-problem-when-switching-from-MCIMX7U3DVK07SC-to/m-p/2087905#M236745</guid>
      <dc:creator>Rita_Wang</dc:creator>
      <dc:date>2025-04-28T03:12:01Z</dc:date>
    </item>
    <item>
      <title>Re: Kernel panic problem when switching from MCIMX7U3DVK07SC to MCIMX7U3DVK07SD chip (Rev B1 to B2))</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Kernel-panic-problem-when-switching-from-MCIMX7U3DVK07SC-to/m-p/2088241#M236759</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/57740"&gt;@Rita_Wang&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;We are using the meta-imx version of NXP pointing to this version&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;A href="https://github.com/nxp-imx/meta-imx/tree/a0303c88a5abf96cbe3e4dccd339a323aad726fa" target="_blank"&gt;https://github.com/nxp-imx/meta-imx/tree/a0303c88a5abf96cbe3e4dccd339a323aad726fa&lt;/A&gt;&lt;/P&gt;&lt;P&gt;It is made custom for the application and version 5.15.71 linux kernel is used. U-boot version is 2022.07.&lt;/P&gt;&lt;P&gt;I couldn't find the specific 2.2.0 , 2.2.1 or 2.2.2&amp;nbsp; version of the linux version.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;But the chips are using exactly the same uboot and image . only difference is silicon revision B1 and B2.&lt;/P&gt;&lt;P&gt;I have limited log from production, I attach both logs here. They will ship the device into me within the day, I will have more information.&lt;/P&gt;&lt;P&gt;I was not part of the team, when this version is released, and nobody is working for the company in these days that worked for the project. If I give insufficient info, ask for more. I will do my best&lt;/P&gt;&lt;P&gt;Thanks for your help.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 28 Apr 2025 09:44:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Kernel-panic-problem-when-switching-from-MCIMX7U3DVK07SC-to/m-p/2088241#M236759</guid>
      <dc:creator>budulger</dc:creator>
      <dc:date>2025-04-28T09:44:38Z</dc:date>
    </item>
    <item>
      <title>Re: Kernel panic problem when switching from MCIMX7U3DVK07SC to MCIMX7U3DVK07SD chip (Rev B1 to B2))</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Kernel-panic-problem-when-switching-from-MCIMX7U3DVK07SC-to/m-p/2088915#M236790</link>
      <description>&lt;P&gt;Both&amp;nbsp;&lt;SPAN&gt;2.2.0 , 2.2.1 or 2.2.2 are our GA version:&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Rita_Wang_0-1745902680744.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/335415iF9212CDDD397F331/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Rita_Wang_0-1745902680744.png" alt="Rita_Wang_0-1745902680744.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&lt;A href="https://github.com/nxp-imx/meta-imx/tree/kirkstone-5.15.71-2.2.0" target="_blank"&gt;GitHub - nxp-imx/meta-imx at kirkstone-5.15.71-2.2.0&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Which one are you using?&lt;/P&gt;</description>
      <pubDate>Tue, 29 Apr 2025 04:58:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Kernel-panic-problem-when-switching-from-MCIMX7U3DVK07SC-to/m-p/2088915#M236790</guid>
      <dc:creator>Rita_Wang</dc:creator>
      <dc:date>2025-04-29T04:58:41Z</dc:date>
    </item>
    <item>
      <title>Re: Kernel panic problem when switching from MCIMX7U3DVK07SC to MCIMX7U3DVK07SD chip (Rev B1 to B2))</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Kernel-panic-problem-when-switching-from-MCIMX7U3DVK07SC-to/m-p/2089040#M236795</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/57740"&gt;@Rita_Wang&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;&lt;P&gt;Right now I figured it out,&lt;/P&gt;&lt;P&gt;meta-imx layer is&amp;nbsp;&lt;SPAN&gt;5.15.52-2.1.0,&amp;nbsp; with srcrev =&amp;nbsp;36363d8623ba60858e2632b7d2b70dae932c9a8b&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;But they made a custom layer on top of it, and customized the 5.15.52-2.1.0 version.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Sorry for confusion.&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;Burak&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 29 Apr 2025 07:16:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Kernel-panic-problem-when-switching-from-MCIMX7U3DVK07SC-to/m-p/2089040#M236795</guid>
      <dc:creator>budulger</dc:creator>
      <dc:date>2025-04-29T07:16:50Z</dc:date>
    </item>
    <item>
      <title>Re: Kernel panic problem when switching from MCIMX7U3DVK07SC to MCIMX7U3DVK07SD chip (Rev B1 to B2))</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Kernel-panic-problem-when-switching-from-MCIMX7U3DVK07SC-to/m-p/2089174#M236801</link>
      <description>&lt;P&gt;I see that the two log are the download log, not for the boot up.&lt;/P&gt;
&lt;P&gt;They can all finishing download images to board well.&lt;/P&gt;</description>
      <pubDate>Tue, 29 Apr 2025 08:43:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Kernel-panic-problem-when-switching-from-MCIMX7U3DVK07SC-to/m-p/2089174#M236801</guid>
      <dc:creator>Rita_Wang</dc:creator>
      <dc:date>2025-04-29T08:43:48Z</dc:date>
    </item>
    <item>
      <title>Re: Kernel panic problem when switching from MCIMX7U3DVK07SC to MCIMX7U3DVK07SD chip (Rev B1 to B2))</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Kernel-panic-problem-when-switching-from-MCIMX7U3DVK07SC-to/m-p/2089182#M236802</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/249876"&gt;@budulger&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;For this two version chip, are you using the same code?&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;You can share it to us, and due to the labor holiday in our china, I will leave work now and back to work on the 7th May, I will help check it then.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;If your questions is urgent you can try to creat new cases in our website,&amp;nbsp;&lt;A href="https://www.nxp.com/support/support:SUPPORTHOME?tid=sbmenu" target="_blank"&gt;Support | NXP Semiconductors&lt;/A&gt;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;If not urgent, you can wait for me back. Thanks.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Wish you have a nice day&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Best Regards&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Rita&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 29 Apr 2025 08:49:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Kernel-panic-problem-when-switching-from-MCIMX7U3DVK07SC-to/m-p/2089182#M236802</guid>
      <dc:creator>Rita_Wang</dc:creator>
      <dc:date>2025-04-29T08:49:29Z</dc:date>
    </item>
    <item>
      <title>Re: Kernel panic problem when switching from MCIMX7U3DVK07SC to MCIMX7U3DVK07SD chip (Rev B1 to B2))</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Kernel-panic-problem-when-switching-from-MCIMX7U3DVK07SC-to/m-p/2089184#M236803</link>
      <description>&lt;P&gt;As the devices didn't boot up, this is all we get from UART. Normally we make ssh to check the kernel messages.&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/57740"&gt;@Rita_Wang&lt;/a&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 29 Apr 2025 08:49:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Kernel-panic-problem-when-switching-from-MCIMX7U3DVK07SC-to/m-p/2089184#M236803</guid>
      <dc:creator>budulger</dc:creator>
      <dc:date>2025-04-29T08:49:41Z</dc:date>
    </item>
    <item>
      <title>Re: Kernel panic problem when switching from MCIMX7U3DVK07SC to MCIMX7U3DVK07SD chip (Rev B1 to B2))</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Kernel-panic-problem-when-switching-from-MCIMX7U3DVK07SC-to/m-p/2089186#M236804</link>
      <description>we are using exactly the same code for these chips, it is kinda urgent issue. I will post it into support also&lt;BR /&gt;</description>
      <pubDate>Tue, 29 Apr 2025 08:50:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Kernel-panic-problem-when-switching-from-MCIMX7U3DVK07SC-to/m-p/2089186#M236804</guid>
      <dc:creator>budulger</dc:creator>
      <dc:date>2025-04-29T08:50:51Z</dc:date>
    </item>
    <item>
      <title>Re: Kernel panic problem when switching from MCIMX7U3DVK07SC to MCIMX7U3DVK07SD chip (Rev B1 to B2))</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Kernel-panic-problem-when-switching-from-MCIMX7U3DVK07SC-to/m-p/2089193#M236805</link>
      <description>&lt;P&gt;Can board boot up well with the&amp;nbsp;&lt;SPAN&gt;MCIMX7U3DVK07SC?&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 29 Apr 2025 08:54:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Kernel-panic-problem-when-switching-from-MCIMX7U3DVK07SC-to/m-p/2089193#M236805</guid>
      <dc:creator>Rita_Wang</dc:creator>
      <dc:date>2025-04-29T08:54:45Z</dc:date>
    </item>
    <item>
      <title>Re: Kernel panic problem when switching from MCIMX7U3DVK07SC to MCIMX7U3DVK07SD chip (Rev B1 to B2))</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Kernel-panic-problem-when-switching-from-MCIMX7U3DVK07SC-to/m-p/2089205#M236809</link>
      <description>yes, it can boot up without problem,&lt;BR /&gt;&lt;BR /&gt;The chips in question were sealed on 06-Dec-2024, possibly affected by the NXP mask</description>
      <pubDate>Tue, 29 Apr 2025 09:01:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Kernel-panic-problem-when-switching-from-MCIMX7U3DVK07SC-to/m-p/2089205#M236809</guid>
      <dc:creator>budulger</dc:creator>
      <dc:date>2025-04-29T09:01:08Z</dc:date>
    </item>
    <item>
      <title>Re: Kernel panic problem when switching from MCIMX7U3DVK07SC to MCIMX7U3DVK07SD chip (Rev B1 to B2))</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Kernel-panic-problem-when-switching-from-MCIMX7U3DVK07SC-to/m-p/2089275#M236816</link>
      <description>&lt;P&gt;OK, i will help check when I back from holiday.&lt;/P&gt;</description>
      <pubDate>Tue, 29 Apr 2025 10:32:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Kernel-panic-problem-when-switching-from-MCIMX7U3DVK07SC-to/m-p/2089275#M236816</guid>
      <dc:creator>Rita_Wang</dc:creator>
      <dc:date>2025-04-29T10:32:29Z</dc:date>
    </item>
    <item>
      <title>Re: Kernel panic problem when switching from MCIMX7U3DVK07SC to MCIMX7U3DVK07SD chip (Rev B1 to B2))</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Kernel-panic-problem-when-switching-from-MCIMX7U3DVK07SC-to/m-p/2093321#M237026</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/249876"&gt;@budulger&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;The version BSP you are using is the&amp;nbsp;LF5.15.52_2.1.0, it is too old for the&amp;nbsp;&lt;SPAN class="lia-link-navigation lia-link-disabled"&gt;MCIMX7U3DVK07SD.&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN class="lia-link-navigation lia-link-disabled"&gt;So here recommend you to choose newest or newer BSP version&amp;nbsp;&lt;A href="https://www.nxp.com/design/design-center/software/embedded-software/i-mx-software/embedded-linux-for-i-mx-applications-processors:IMXLINUX" target="_blank"&gt;Embedded Linux for i.MX Applications Processors | NXP Semiconductors&lt;/A&gt;.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN class="lia-link-navigation lia-link-disabled"&gt;If stll not work tell us.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN class="lia-link-navigation lia-link-disabled"&gt;Wish you have a nice day&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN class="lia-link-navigation lia-link-disabled"&gt;Best Regards&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN class="lia-link-navigation lia-link-disabled"&gt;Rita&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 08 May 2025 05:48:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Kernel-panic-problem-when-switching-from-MCIMX7U3DVK07SC-to/m-p/2093321#M237026</guid>
      <dc:creator>Rita_Wang</dc:creator>
      <dc:date>2025-05-08T05:48:38Z</dc:date>
    </item>
    <item>
      <title>Re: Kernel panic problem when switching from MCIMX7U3DVK07SC to MCIMX7U3DVK07SD chip (Rev B1 to B2))</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Kernel-panic-problem-when-switching-from-MCIMX7U3DVK07SC-to/m-p/2095937#M237144</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/249876"&gt;@budulger&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;How about the status in your side? Can&amp;nbsp; MCIMX7U3DVK07SD work with new version BSP?&lt;/P&gt;
&lt;P&gt;If still not work tell us.&lt;/P&gt;
&lt;P&gt;Wish you have a nice day&lt;/P&gt;
&lt;P&gt;Best Regards&lt;/P&gt;
&lt;P&gt;Rita&lt;/P&gt;</description>
      <pubDate>Tue, 13 May 2025 02:40:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Kernel-panic-problem-when-switching-from-MCIMX7U3DVK07SC-to/m-p/2095937#M237144</guid>
      <dc:creator>Rita_Wang</dc:creator>
      <dc:date>2025-05-13T02:40:58Z</dc:date>
    </item>
  </channel>
</rss>

