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    <title>i.MX ProcessorsのトピックDevice Tree Configuration for PCA9535 Interrupt on IMX8M Plus</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Device-Tree-Configuration-for-PCA9535-Interrupt-on-IMX8M-Plus/m-p/2086623#M236679</link>
    <description>&lt;P class=""&gt;I am working on a custom board based on the i.MX8M Plus processor, and I am using a PCA9535 GPIO expander connected via I2C. The PCA9535 is connected to the I2C bus, and its INT pin is wired to the GPIO5_IO04 pin.&lt;/P&gt;&lt;P class=""&gt;The GPIO expander is correctly detected over I2C, and the relevant driver (gpio-pca953x) is enabled in the kernel. However, I am facing issues with correctly defining the interrupt and pad control configuration in the device tree. I would like the expander to trigger interrupts when input state changes occur, but I am not sure if I have defined the interrupts and interrupt-parent properties correctly.&lt;/P&gt;&lt;P class=""&gt;Additionally, I need guidance on how to properly configure the pad control settings to ensure the pin is set up correctly.&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;DIV&gt;&lt;SPAN&gt;pca953x_0&lt;/SPAN&gt;&lt;SPAN&gt;:&lt;/SPAN&gt;&lt;SPAN&gt;gpio@21&lt;/SPAN&gt;&lt;SPAN&gt; {&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; compatible = &lt;/SPAN&gt;&lt;SPAN&gt;"nxp,pca9535"&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; gpio-controller;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; #gpio-cell = &amp;lt;&lt;/SPAN&gt;&lt;SPAN&gt;2&lt;/SPAN&gt;&lt;SPAN&gt;&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; reg = &amp;lt;&lt;/SPAN&gt;&lt;SPAN&gt;0x21&lt;/SPAN&gt;&lt;SPAN&gt;&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; interrupt-controller;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; #interrupt-cells = &amp;lt;&lt;/SPAN&gt;&lt;SPAN&gt;2&lt;/SPAN&gt;&lt;SPAN&gt;&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; pinctrl-names = &lt;/SPAN&gt;&lt;SPAN&gt;"default"&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; pinctrl-0 = &amp;lt;&lt;/SPAN&gt;&lt;SPAN&gt;&amp;amp;pinctrl_expanderio&lt;/SPAN&gt;&lt;SPAN&gt;&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; interrupt-parent = &amp;lt;&lt;/SPAN&gt;&lt;SPAN&gt;&amp;amp;gpio5&lt;/SPAN&gt;&lt;SPAN&gt;&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; interrupts = &amp;lt;&lt;/SPAN&gt;&lt;SPAN&gt;4&lt;/SPAN&gt; &lt;SPAN&gt;IRQ_TYPE_LEVEL_LOW&lt;/SPAN&gt;&lt;SPAN&gt;&amp;gt;; &lt;/SPAN&gt;&lt;SPAN&gt;/* gpio5_4 */&lt;BR /&gt;}&lt;/SPAN&gt;&lt;/DIV&gt;&lt;P class=""&gt;&lt;BR /&gt;&lt;BR /&gt;....&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;pinctrl_expanderio&lt;/SPAN&gt;&lt;SPAN&gt;: &lt;/SPAN&gt;&lt;SPAN&gt;expanderiogrp&lt;/SPAN&gt;&lt;SPAN&gt; {&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; fsl,pins = &amp;lt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;MX8MP_IOMUXC_SPDIF_RX__GPIO5_IO04&lt;/SPAN&gt;&lt;SPAN&gt; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;0x41&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;/* GPIO10 */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; };&lt;/SPAN&gt;&lt;/DIV&gt;&lt;/DIV&gt;</description>
    <pubDate>Thu, 24 Apr 2025 13:05:26 GMT</pubDate>
    <dc:creator>sem</dc:creator>
    <dc:date>2025-04-24T13:05:26Z</dc:date>
    <item>
      <title>Device Tree Configuration for PCA9535 Interrupt on IMX8M Plus</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Device-Tree-Configuration-for-PCA9535-Interrupt-on-IMX8M-Plus/m-p/2086623#M236679</link>
      <description>&lt;P class=""&gt;I am working on a custom board based on the i.MX8M Plus processor, and I am using a PCA9535 GPIO expander connected via I2C. The PCA9535 is connected to the I2C bus, and its INT pin is wired to the GPIO5_IO04 pin.&lt;/P&gt;&lt;P class=""&gt;The GPIO expander is correctly detected over I2C, and the relevant driver (gpio-pca953x) is enabled in the kernel. However, I am facing issues with correctly defining the interrupt and pad control configuration in the device tree. I would like the expander to trigger interrupts when input state changes occur, but I am not sure if I have defined the interrupts and interrupt-parent properties correctly.&lt;/P&gt;&lt;P class=""&gt;Additionally, I need guidance on how to properly configure the pad control settings to ensure the pin is set up correctly.&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;DIV&gt;&lt;SPAN&gt;pca953x_0&lt;/SPAN&gt;&lt;SPAN&gt;:&lt;/SPAN&gt;&lt;SPAN&gt;gpio@21&lt;/SPAN&gt;&lt;SPAN&gt; {&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; compatible = &lt;/SPAN&gt;&lt;SPAN&gt;"nxp,pca9535"&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; gpio-controller;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; #gpio-cell = &amp;lt;&lt;/SPAN&gt;&lt;SPAN&gt;2&lt;/SPAN&gt;&lt;SPAN&gt;&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; reg = &amp;lt;&lt;/SPAN&gt;&lt;SPAN&gt;0x21&lt;/SPAN&gt;&lt;SPAN&gt;&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; interrupt-controller;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; #interrupt-cells = &amp;lt;&lt;/SPAN&gt;&lt;SPAN&gt;2&lt;/SPAN&gt;&lt;SPAN&gt;&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; pinctrl-names = &lt;/SPAN&gt;&lt;SPAN&gt;"default"&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; pinctrl-0 = &amp;lt;&lt;/SPAN&gt;&lt;SPAN&gt;&amp;amp;pinctrl_expanderio&lt;/SPAN&gt;&lt;SPAN&gt;&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; interrupt-parent = &amp;lt;&lt;/SPAN&gt;&lt;SPAN&gt;&amp;amp;gpio5&lt;/SPAN&gt;&lt;SPAN&gt;&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; interrupts = &amp;lt;&lt;/SPAN&gt;&lt;SPAN&gt;4&lt;/SPAN&gt; &lt;SPAN&gt;IRQ_TYPE_LEVEL_LOW&lt;/SPAN&gt;&lt;SPAN&gt;&amp;gt;; &lt;/SPAN&gt;&lt;SPAN&gt;/* gpio5_4 */&lt;BR /&gt;}&lt;/SPAN&gt;&lt;/DIV&gt;&lt;P class=""&gt;&lt;BR /&gt;&lt;BR /&gt;....&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;pinctrl_expanderio&lt;/SPAN&gt;&lt;SPAN&gt;: &lt;/SPAN&gt;&lt;SPAN&gt;expanderiogrp&lt;/SPAN&gt;&lt;SPAN&gt; {&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; fsl,pins = &amp;lt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;MX8MP_IOMUXC_SPDIF_RX__GPIO5_IO04&lt;/SPAN&gt;&lt;SPAN&gt; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;0x41&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;/* GPIO10 */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; };&lt;/SPAN&gt;&lt;/DIV&gt;&lt;/DIV&gt;</description>
      <pubDate>Thu, 24 Apr 2025 13:05:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Device-Tree-Configuration-for-PCA9535-Interrupt-on-IMX8M-Plus/m-p/2086623#M236679</guid>
      <dc:creator>sem</dc:creator>
      <dc:date>2025-04-24T13:05:26Z</dc:date>
    </item>
    <item>
      <title>Re: Device Tree Configuration for PCA9535 Interrupt on IMX8M Plus</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Device-Tree-Configuration-for-PCA9535-Interrupt-on-IMX8M-Plus/m-p/2087418#M236719</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;According to documentation it is correctly configured:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://github.com/nxp-imx/linux-imx/blob/37d02f4dcbbe6677dc9f5fc17f386c05d6a7bd7a/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml#L43" target="_blank"&gt;linux-imx/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml at 37d02f4dcbbe6677dc9f5fc17f386c05d6a7bd7a · nxp-imx/linux-imx&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Since interrupt pin has an open-drain configuration, please configure it in the next way as is in our EVK (is not the same I2C port expander but also has an open-drain configuration).&lt;/P&gt;
&lt;P&gt;&lt;A href="https://github.com/nxp-imx/linux-imx/blob/lf-6.6.y/arch/arm64/boot/dts/freescale/imx8mp-evk.dts" target="_blank"&gt;linux-imx/arch/arm64/boot/dts/freescale/imx8mp-evk.dts at lf-6.6.y · nxp-imx/linux-imx&lt;/A&gt;&lt;/P&gt;
&lt;LI-CODE lang="c"&gt;pinctrl_expanderio: expanderiogrp {
        fsl,pins = &amp;lt;
                MX8MP_IOMUXC_SPDIF_RX__GPIO5_IO04       0x146  /* GPIO10 - Input pull-up */
        &amp;gt;;
};
&lt;/LI-CODE&gt;
&lt;P&gt;Best regards.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 25 Apr 2025 16:21:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Device-Tree-Configuration-for-PCA9535-Interrupt-on-IMX8M-Plus/m-p/2087418#M236719</guid>
      <dc:creator>JorgeCas</dc:creator>
      <dc:date>2025-04-25T16:21:29Z</dc:date>
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