<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>i.MX ProcessorsのトピックRe: i.MX8MP MIPI_CSI2 Interface Limitations</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8MP-MIPI-CSI2-Interface-Limitations/m-p/2086603#M236675</link>
    <description>&lt;P&gt;Hello &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/34846"&gt;@Bio_TICFSL&lt;/a&gt;,&lt;/P&gt;&lt;P&gt;Thanks for pointing to this Application Notes.&lt;/P&gt;&lt;P&gt;I had read it in the past but missed the table with the ISI input assignemnts.&lt;/P&gt;&lt;P&gt;For future reference, if someone needs to use a higher resolution camera with the second MIPI_CSI interface of the i.MX8MP, you need to set the following in the device tree:&lt;/P&gt;&lt;LI-CODE lang="c"&gt;&amp;amp;isi_0 {
	interface = &lt;LI-EMOJI id="lia_red-heart" title=":red_heart:"&gt;&lt;/LI-EMOJI&gt; 0 2&amp;gt;;
};&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;From my testing the intended use case of switching this at runtime has proven to be unsupported by the drivers involved.&lt;/P&gt;&lt;P&gt;Can I use the ISP for 2x high resolution (more than 2048 width) captures? Or are there similar limitations there?&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Bruno&lt;/P&gt;</description>
    <pubDate>Thu, 24 Apr 2025 12:19:06 GMT</pubDate>
    <dc:creator>brunomellotx</dc:creator>
    <dc:date>2025-04-24T12:19:06Z</dc:date>
    <item>
      <title>i.MX8MP MIPI_CSI2 Interface Limitations</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8MP-MIPI-CSI2-Interface-Limitations/m-p/2079907#M236274</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I want to better understand the limitations of the MIPI_CSI2 interface on the i.MX8MP. As a customer using one of our SoMs featuring this SoC is running into some issues.&lt;/P&gt;&lt;P&gt;The i.MX8MP features two MIPI-CSI interfaces. Reading the Datasheet and the Reference Manual the only limitations mentioned are related to the pixel clock:&lt;/P&gt;&lt;BLOCKQUOTE&gt;&lt;P&gt;For single Camera, MIPI CSI 1 can support up to 400/500 MHz pixel clock in the&lt;BR /&gt;Nominal/Overdrive mode.&lt;BR /&gt;• For single Camera, MIPI CSI 2 can support up to 277 MHz pixel clock.&lt;BR /&gt;• For dual Camera, both MIPI CSI can support up to 266 MHz pixel clock.&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;We are running into some issues with MIPI CSI 2 with higher resolutions (&amp;gt; 2048 horizontal). From my research this is likely not a limitation of the MIPI CSI interface, but with the ISI.&lt;/P&gt;&lt;P&gt;On the ISI side, I see some limitations of resolutions with a horizontal resolution higher than 2048, specifically on the reference manual, section 13.4 Image Sensing Interface (ISI).&lt;/P&gt;&lt;P&gt;There, it mentions that the line buffers need to be shared to achieve higher resolutions.&lt;/P&gt;&lt;P&gt;It is my understanding that this should not limit the MIPI CSI 2 interface of using higher resolutions, as the pixel link crossbar should allow the data from MIPI CSI 2 to be routed to a channel that has support for chain buffering.&lt;/P&gt;&lt;P&gt;Is this understanding correct? If so, how could this be configured on the device tree when running linux?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Bruno&lt;/P&gt;</description>
      <pubDate>Mon, 14 Apr 2025 11:05:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8MP-MIPI-CSI2-Interface-Limitations/m-p/2079907#M236274</guid>
      <dc:creator>brunomellotx</dc:creator>
      <dc:date>2025-04-14T11:05:38Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8MP MIPI_CSI2 Interface Limitations</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8MP-MIPI-CSI2-Interface-Limitations/m-p/2079922#M236276</link>
      <description>&lt;P&gt;To clarify the question here: It is about the second MIPI CSI interface (MIPI_CSI2) of the i.MX8MP.&lt;/P&gt;&lt;P&gt;Higher resolution cameras work without issues with the first MIPI CSI interface (MIPI_CSI1).&lt;/P&gt;</description>
      <pubDate>Mon, 14 Apr 2025 11:46:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8MP-MIPI-CSI2-Interface-Limitations/m-p/2079922#M236276</guid>
      <dc:creator>brunomellotx</dc:creator>
      <dc:date>2025-04-14T11:46:58Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8MP MIPI_CSI2 Interface Limitations</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8MP-MIPI-CSI2-Interface-Limitations/m-p/2080040#M236284</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;Yes you understanding are correct! &lt;/P&gt;
&lt;P&gt;Regards&lt;/P&gt;</description>
      <pubDate>Mon, 14 Apr 2025 14:17:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8MP-MIPI-CSI2-Interface-Limitations/m-p/2080040#M236284</guid>
      <dc:creator>Bio_TICFSL</dc:creator>
      <dc:date>2025-04-14T14:17:16Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8MP MIPI_CSI2 Interface Limitations</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8MP-MIPI-CSI2-Interface-Limitations/m-p/2080504#M236322</link>
      <description>&lt;P&gt;Hello &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/34846"&gt;@Bio_TICFSL&lt;/a&gt;,&lt;/P&gt;&lt;P&gt;Thanks for the confirmation.&lt;/P&gt;&lt;P&gt;How can I configure the device tree to connect MIPI_CSI2 to an ISI channel that supports horizontal resolutions higher than 2048?&lt;/P&gt;&lt;P&gt;For my testing I use &lt;A href="https://git.toradex.com/cgit/device-tree-overlays.git/tree/overlays/verdin-imx8mp_mezzanine_ov5640-alt-jumpers_overlay.dts?h=toradex_6.6-2.2.x-imx" target="_blank"&gt;this overlay&lt;/A&gt; with an OV5640 camera, but if you have an example from NXP's BSP or for another sensor that would already be very useful.&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Bruno&lt;/P&gt;</description>
      <pubDate>Tue, 15 Apr 2025 06:34:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8MP-MIPI-CSI2-Interface-Limitations/m-p/2080504#M236322</guid>
      <dc:creator>brunomellotx</dc:creator>
      <dc:date>2025-04-15T06:34:26Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8MP MIPI_CSI2 Interface Limitations</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8MP-MIPI-CSI2-Interface-Limitations/m-p/2081008#M236351</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;By default, the &lt;A href="https://source.codeaurora.org/external/imx/linux-imx/tree/arch/arm64/boot/dts/freescale/imx8mp-evk.dts" target="_self" rel="nofollow noopener noreferrer"&gt;imx8mp-evk.dts&lt;/A&gt; supports single ov5640 camera via CSI0 interface:&lt;/P&gt;
&lt;P&gt;- ov5640 sensor node :&lt;/P&gt;
&lt;PRE class="lia-code-sample  language-markup"&gt;&lt;CODE&gt;	ov5640_0: ov5640_mipi@3c {
		compatible = "ovti,ov5640";
		reg = &amp;lt;0x3c&amp;gt;;
		pinctrl-names = "default";
		pinctrl-0 = &amp;lt;&amp;amp;pinctrl_csi0_pwn&amp;gt;, &amp;lt;&amp;amp;pinctrl_csi0_rst&amp;gt;, &amp;lt;&amp;amp;pinctrl_csi_mclk&amp;gt;;
		clocks = &amp;lt;&amp;amp;clk IMX8MP_CLK_IPP_DO_CLKO2&amp;gt;;
		clock-names = "xclk";
		assigned-clocks = &amp;lt;&amp;amp;clk IMX8MP_CLK_IPP_DO_CLKO2&amp;gt;;
		assigned-clock-parents = &amp;lt;&amp;amp;clk IMX8MP_CLK_24M&amp;gt;;
		assigned-clock-rates = &amp;lt;24000000&amp;gt;;
		csi_id = &amp;lt;0&amp;gt;;
		powerdown-gpios = &amp;lt;&amp;amp;gpio2 11 GPIO_ACTIVE_HIGH&amp;gt;;
		reset-gpios = &amp;lt;&amp;amp;gpio1 6 GPIO_ACTIVE_LOW&amp;gt;;
		mclk = &amp;lt;24000000&amp;gt;;
		mclk_source = &amp;lt;0&amp;gt;;
		mipi_csi;
		status = "okay";

		port {
			ov5640_mipi_0_ep: endpoint {
				remote-endpoint = &amp;lt;&amp;amp;mipi_csi0_ep&amp;gt;;
				data-lanes = &amp;lt;1 2&amp;gt;;
				clock-lanes = &amp;lt;0&amp;gt;;
			};
		};
	};&lt;/CODE&gt;&lt;/PRE&gt;
&lt;P&gt;- mipi-csi2 node :&lt;/P&gt;
&lt;PRE class="lia-code-sample  language-markup"&gt;&lt;CODE&gt;&amp;amp;mipi_csi_0 {
	#address-cells = &amp;lt;1&amp;gt;;
	#size-cells = &amp;lt;0&amp;gt;;
	status = "okay";

	port@0 {
		reg = &amp;lt;0&amp;gt;;
		mipi_csi0_ep: endpoint {
			remote-endpoint = &amp;lt;&amp;amp;ov5640_mipi_0_ep&amp;gt;;
			data-lanes = &amp;lt;2&amp;gt;;
			csis-hs-settle = &amp;lt;13&amp;gt;;
			csis-clk-settle = &amp;lt;2&amp;gt;;
			csis-wclk;
		};
	};
};&lt;/CODE&gt;&lt;/PRE&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;You should have the ov5640 camera module(s) connected to the MIPI-CSI2 connectors of the board (EVK for example) so that the driver can communicate with and identify it before registering into the system as /dev/video0.&lt;/P&gt;
&lt;P&gt;If you expect to use dual ov5640 sensors (via both mipi-csi2 interfaces), work-around might be necessary on power-down and reset signals of second one :&amp;nbsp;&lt;A href="https://community.nxp.com/t5/i-MX-Processors/Dual-OV5640-cameras-on-iMX8M-Plus/m-p/1250820" target="_blank" rel="noopener"&gt;https://community.nxp.com/t5/i-MX-Processors/Dual-OV5640-cameras-on-iMX8M-Plus/m-p/1250820&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards&lt;/P&gt;
&lt;P&gt;There's also other examples of using dual camera sensors such as &lt;A href="https://source.codeaurora.org/external/imx/linux-imx/tree/arch/arm64/boot/dts/freescale/imx8mp-evk-dual-ov2775.dts?h=lf-5.10.52-2.1.0" target="_self" rel="nofollow noopener noreferrer"&gt;imx8mp-evk-dual-ov2775.dts&lt;/A&gt; or &lt;A href="https://source.codeaurora.org/external/imx/linux-imx/tree/arch/arm64/boot/dts/freescale/imx8mp-evk-dual-basler.dts?h=lf-5.10.52-2.1.0" target="_self" rel="nofollow noopener noreferrer"&gt;imx8mp-evk-dual-basler.dts&lt;/A&gt;. Please have a look.&lt;/P&gt;</description>
      <pubDate>Tue, 15 Apr 2025 16:22:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8MP-MIPI-CSI2-Interface-Limitations/m-p/2081008#M236351</guid>
      <dc:creator>Bio_TICFSL</dc:creator>
      <dc:date>2025-04-15T16:22:11Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8MP MIPI_CSI2 Interface Limitations</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8MP-MIPI-CSI2-Interface-Limitations/m-p/2084654#M236570</link>
      <description>&lt;P&gt;Hello &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/34846"&gt;@Bio_TICFSL&lt;/a&gt;,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks for your response and sorry for the delay here.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Unfortunately, the examples you sent do not give me a working example of the second MIPI CSI interface being used for a higher resolution image.&lt;/P&gt;&lt;P&gt;When I use the following configuration, v4l-ctl does not show a mode with a resolution higher than 1920x1080.&lt;/P&gt;&lt;LI-CODE lang="c"&gt;&amp;amp;i2c2 {
	#address-cells = &amp;lt;1&amp;gt;;
	#size-cells = &amp;lt;0&amp;gt;;
	status = "okay";

	camera@3c {
		compatible = "ovti,ov5640";
		reg = &amp;lt;0x3c&amp;gt;;
		clocks = &amp;lt;&amp;amp;clk_camera_mezzanine_csi&amp;gt;;
		clock-names = "xclk";
		AVDD-supply = &amp;lt;&amp;amp;regulator_camera_mezzanine&amp;gt;;
		DVDD-supply = &amp;lt;&amp;amp;regulator_camera_mezzanine&amp;gt;;
		DOVDD-supply = &amp;lt;&amp;amp;regulator_camera_mezzanine&amp;gt;;
		PVDD-supply = &amp;lt;&amp;amp;regulator_camera_mezzanine&amp;gt;;
		/* Verdin GPIO2 (JP6 1-2) - Mezannine Camera Connector 22 */
		powerdown-gpios = &amp;lt;&amp;amp;gpio1 1 GPIO_ACTIVE_HIGH&amp;gt;;
		/* Verdin GPIO1 (JP5 1-2) - Mezannine Camera Connector 11 */
		reset-gpios = &amp;lt;&amp;amp;gpio1 0 GPIO_ACTIVE_LOW&amp;gt;;

		port {
			ov5640_mipi_1_ep: endpoint {
				clock-lanes = &amp;lt;0&amp;gt;;
				data-lanes = &amp;lt;1 2&amp;gt;;
				remote-endpoint = &amp;lt;&amp;amp;mipi_csi1_ep&amp;gt;;
			};
		};
	};
};

&amp;amp;isi_1 {
	status = "okay";

	cap_device {
		status = "okay";
	};
};

&amp;amp;mipi_csi_1 {
	#address-cells = &amp;lt;1&amp;gt;;
	#size-cells = &amp;lt;0&amp;gt;;
	status = "okay";

	port@1 {
		reg = &amp;lt;1&amp;gt;;

		mipi_csi1_ep: endpoint {
			csis-hs-settle = &amp;lt;13&amp;gt;;
			csis-clk-settle = &amp;lt;2&amp;gt;;
			csis-wclk;
			data-lanes = &amp;lt;2&amp;gt;;
			remote-endpoint = &amp;lt;&amp;amp;ov5640_mipi_1_ep&amp;gt;;
		};
	};
};&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Eventually this will be for a dual-camera use case, but for now I just want to be able to capture an image with a larger resolution from the second MIPI-CSI interface of the i.MX8MP.&lt;BR /&gt;The use case is for sporadic captures, so the cameras could use the same ISI processing pipeline, just not at the same time.&lt;/P&gt;&lt;P&gt;It seems that MIPI_CSI2 is hard-coded somewhere to always use the second ISI processing pipeline (isi_1 node in the device tree), which cannot use both line buffers.&lt;/P&gt;&lt;P&gt;How can I configure it so the second MIPI-CSI interface (mipi_csi_1 node) is connected to the first ISI processing pipeline (isi_0 node)?&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Bruno&lt;/P&gt;</description>
      <pubDate>Tue, 22 Apr 2025 13:28:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8MP-MIPI-CSI2-Interface-Limitations/m-p/2084654#M236570</guid>
      <dc:creator>brunomellotx</dc:creator>
      <dc:date>2025-04-22T13:28:09Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8MP MIPI_CSI2 Interface Limitations</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8MP-MIPI-CSI2-Interface-Limitations/m-p/2085512#M236617</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;Please check it:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.nxp.com/docs/en/application-note/AN13430.pdf" target="_blank"&gt;https://www.nxp.com/docs/en/application-note/AN13430.pdf&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Regards&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 23 Apr 2025 14:25:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8MP-MIPI-CSI2-Interface-Limitations/m-p/2085512#M236617</guid>
      <dc:creator>Bio_TICFSL</dc:creator>
      <dc:date>2025-04-23T14:25:56Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8MP MIPI_CSI2 Interface Limitations</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8MP-MIPI-CSI2-Interface-Limitations/m-p/2086603#M236675</link>
      <description>&lt;P&gt;Hello &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/34846"&gt;@Bio_TICFSL&lt;/a&gt;,&lt;/P&gt;&lt;P&gt;Thanks for pointing to this Application Notes.&lt;/P&gt;&lt;P&gt;I had read it in the past but missed the table with the ISI input assignemnts.&lt;/P&gt;&lt;P&gt;For future reference, if someone needs to use a higher resolution camera with the second MIPI_CSI interface of the i.MX8MP, you need to set the following in the device tree:&lt;/P&gt;&lt;LI-CODE lang="c"&gt;&amp;amp;isi_0 {
	interface = &lt;LI-EMOJI id="lia_red-heart" title=":red_heart:"&gt;&lt;/LI-EMOJI&gt; 0 2&amp;gt;;
};&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;From my testing the intended use case of switching this at runtime has proven to be unsupported by the drivers involved.&lt;/P&gt;&lt;P&gt;Can I use the ISP for 2x high resolution (more than 2048 width) captures? Or are there similar limitations there?&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Bruno&lt;/P&gt;</description>
      <pubDate>Thu, 24 Apr 2025 12:19:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8MP-MIPI-CSI2-Interface-Limitations/m-p/2086603#M236675</guid>
      <dc:creator>brunomellotx</dc:creator>
      <dc:date>2025-04-24T12:19:06Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8MP MIPI_CSI2 Interface Limitations</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8MP-MIPI-CSI2-Interface-Limitations/m-p/2086645#M236680</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;You can use one at 4K, and two at 2048.&lt;/P&gt;
&lt;P&gt;Regards&lt;/P&gt;</description>
      <pubDate>Thu, 24 Apr 2025 13:25:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8MP-MIPI-CSI2-Interface-Limitations/m-p/2086645#M236680</guid>
      <dc:creator>Bio_TICFSL</dc:creator>
      <dc:date>2025-04-24T13:25:26Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8MP MIPI_CSI2 Interface Limitations</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8MP-MIPI-CSI2-Interface-Limitations/m-p/2086669#M236683</link>
      <description>&lt;P&gt;Hello &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/34846"&gt;@Bio_TICFSL&lt;/a&gt;,&lt;/P&gt;&lt;P&gt;&amp;gt; You can use one at 4K, and two at 2048.&lt;/P&gt;&lt;P&gt;I understand this is a limitation of the ISI.&lt;/P&gt;&lt;P&gt;Is this also the case if we use the ISP and not the ISI?&lt;/P&gt;&lt;P&gt;Or is this not possible?&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Bruno&lt;/P&gt;</description>
      <pubDate>Thu, 24 Apr 2025 14:15:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8MP-MIPI-CSI2-Interface-Limitations/m-p/2086669#M236683</guid>
      <dc:creator>brunomellotx</dc:creator>
      <dc:date>2025-04-24T14:15:42Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8MP MIPI_CSI2 Interface Limitations</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8MP-MIPI-CSI2-Interface-Limitations/m-p/2087348#M236714</link>
      <description>&lt;P&gt;Hello.&lt;/P&gt;
&lt;P&gt;Yes it applies to both.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards&lt;/P&gt;</description>
      <pubDate>Fri, 25 Apr 2025 14:17:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8MP-MIPI-CSI2-Interface-Limitations/m-p/2087348#M236714</guid>
      <dc:creator>Bio_TICFSL</dc:creator>
      <dc:date>2025-04-25T14:17:07Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8MP MIPI_CSI2 Interface Limitations</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8MP-MIPI-CSI2-Interface-Limitations/m-p/2088046#M236755</link>
      <description>&lt;P&gt;Hello &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/34846"&gt;@Bio_TICFSL&lt;/a&gt;,&lt;/P&gt;&lt;P&gt;Thanks for the clarification.&lt;/P&gt;&lt;P&gt;This topic can be closed.&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Bruno&lt;/P&gt;</description>
      <pubDate>Mon, 28 Apr 2025 07:12:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8MP-MIPI-CSI2-Interface-Limitations/m-p/2088046#M236755</guid>
      <dc:creator>brunomellotx</dc:creator>
      <dc:date>2025-04-28T07:12:22Z</dc:date>
    </item>
  </channel>
</rss>

