imx8 mini MIPI video 1Gbps clock setting question

sutton_kim — Fri, 21 Mar 2025 18:20:20 GMT

I'm trying to change the D-Phy setting on my imx8 mini from 1.5G bps to 1Gbps D-PHY.
However, CLKCTRL_DPHY_SEL_1G and CLKCTRL_PLLBYPASS are set to the same 29 bits. In the reference manual, CLKCTRL_PLLBYPASS is set to 27 bits. However, when I change CLKCTRL_PLLBYPASS to 27 bits, I get kernel panic and imx_sec_dsim_drv 32e10000.mipi_dsi: Failed to attach bridge: 32e10000.mipi_dsi errors. Can you tell me the cause?

below is in sec-dsim.c define part.

#define CLKCTRL_TXREQUESTHSCLK BIT(31)
#define CLKCTRL_DPHY_SEL_1G BIT(29)
#define CLKCTRL_DPHY_SEL_1P5G (0x0 << 29)
#define CLKCTRL_ESCCLKEN BIT(28)
#define CLKCTRL_PLLBYPASS BIT(29)
#define CLKCTRL_BYTECLKSRC_DPHY_PLL REG_PUT(0, 26, 25)
#define CLKCTRL_BYTECLKEN BIT(24)
#define CLKCTRL_SET_LANEESCCLKEN(x) REG_PUT(x, 23, 19)
#define CLKCTRL_SET_ESCPRESCALER(x) REG_PUT(x, 15, 0)

sec-dsim.c sec_mipi_dsim_config_clkctrl()
static void sec_mipi_dsim_config_clkctrl(struct sec_mipi_dsim *dsim)

{

uint32_t clkctrl = 0, data_lanes_en;

uint32_t byte_clk, esc_prescaler;

clkctrl |= CLKCTRL_TXREQUESTHSCLK;

/* using 1.5Gbps PHY */

clkctrl |= CLKCTRL_DPHY_SEL_1P5G;

clkctrl |= CLKCTRL_ESCCLKEN;

clkctrl &= ~CLKCTRL_PLLBYPASS;

clkctrl |= CLKCTRL_BYTECLKSRC_DPHY_PLL;

clkctrl |= CLKCTRL_BYTECLKEN;

data_lanes_en = (0x1 << dsim->lanes) - 1;

clkctrl |= CLKCTRL_SET_LANEESCCLKEN(0x1 | data_lanes_en << 1);

/* calculate esc prescaler from byte clock:

* EscClk = ByteClk / EscPrescaler;

byte_clk = dsim->bit_clk >> 3;

esc_prescaler = DIV_ROUND_UP(byte_clk, MAX_ESC_CLK_FREQ);

clkctrl |= CLKCTRL_SET_ESCPRESCALER(esc_prescaler);

dsim_write(dsim, clkctrl, DSIM_CLKCTRL);

}

Starting kernel ...

[ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]

[ 0.000000] Linux version 5.4.210 (oe-user@oe-host) (gcc version 9.3.0 (GCC)) #1 SMP PREEMPT Tue Sep 20 15:11:49 UTC 2022

[ 0.000000] Machine model: FSL i.MX8MM LPDDR4 Titan board

[ 0.000000] earlycon: ec_imx6q0 at MMIO 0x0000000030890000 (options '115200')

[ 0.000000] printk: bootconsole [ec_imx6q0] enabled

[ 0.072576] No BMan portals available!

[ 0.073876] No QMan portals available!

[ 0.217625] imx_sec_dsim_drv 32e10000.mipi_dsi: Failed to attach bridge: 32e10000.mipi_dsi

[ 0.225963] imx_sec_dsim_drv 32e10000.mipi_dsi: failed to bind sec dsim bridge: -517

[ 0.364200] *!*!*!*!* Reseting Panel

[ 0.397697] *!*!*!*!* Version 3.0 tianma_panel_enable

[ 0.571499] imx6q-pcie 33800000.pcie: host bridge /soc@0/pcie@33800000 ranges:

[ 0.571525] imx6q-pcie 33800000.pcie: IO 0x1ff80000..0x1ff8ffff -> 0x00000000

[ 0.571539] imx6q-pcie 33800000.pcie: MEM 0x18000000..0x1fefffff -> 0x18000000

[ 0.671435] imx_sec_dsim_drv 32e10000.mipi_dsi: wait payload tx done time out

[ 0.671451] panel-tianma-tm043yvgp44 32e10000.mipi_dsi.0: [drm:tianma_panel_enable] *ERROR* Tianma Panel Error Writing DSI ff

[ 0.673521] imx6q-pcie 33800000.pcie: Link up

[ 0.771439] imx6q-pcie 33800000.pcie: Link up

[ 0.771444] imx6q-pcie 33800000.pcie: Link up, Gen2

[ 0.771566] imx6q-pcie 33800000.pcie: PCI host bridge to bus 0000:00

[ 0.771573] pci_bus 0000:00: root bus resource [bus 00-ff]

[ 0.771578] pci_bus 0000:00: root bus resource [io 0x0000-0xffff]

[ 0.771582] pci_bus 0000:00: root bus resource [mem 0x18000000-0x1fefffff]

[ 0.771605] pci 0000:00:00.0: [16c3:abcd] type 01 class 0x060400

[ 0.771625] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x000fffff]

[ 0.771636] pci 0000:00:00.0: reg 0x38: [mem 0x00000000-0x0000ffff pref]

[ 0.771678] pci 0000:00:00.0: supports D1

[ 0.771683] pci 0000:00:00.0: PME# supported from D0 D1 D3hot D3cold

[ 0.773472] pci 0000:01:00.0: [1172:0000] type 00 class 0xff0000

[ 0.773570] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x00007fff 64bit pref]

[ 0.773612] pci 0000:01:00.0: reg 0x18: [mem 0x00000000-0x00007fff 64bit pref]

[ 0.773654] pci 0000:01:00.0: reg 0x20: [mem 0x00000000-0x000fffff 64bit pref]

[ 0.775539] pci 0000:00:00.0: BAR 0: assigned [mem 0x18000000-0x180fffff]

[ 0.775548] pci 0000:00:00.0: BAR 15: assigned [mem 0x18100000-0x182fffff pref]

[ 0.775554] pci 0000:00:00.0: BAR 6: assigned [mem 0x18300000-0x1830ffff pref]

[ 0.775563] pci 0000:01:00.0: BAR 4: assigned [mem 0x18100000-0x181fffff 64bit pref]

[ 0.775599] pci 0000:01:00.0: BAR 0: assigned [mem 0x18200000-0x18207fff 64bit pref]

[ 0.775634] pci 0000:01:00.0: BAR 2: assigned [mem 0x18208000-0x1820ffff 64bit pref]

[ 0.775668] pci 0000:00:00.0: PCI bridge to [bus 01-ff]

[ 0.775675] pci 0000:00:00.0: bridge window [mem 0x18100000-0x182fffff pref]

[ 0.927444] imx_sec_dsim_drv 32e10000.mipi_dsi: wait pkthdr tx done time out

[ 0.927459] panel-tianma-tm043yvgp44 32e10000.mipi_dsi.0: [drm:tianma_panel_enable] *ERROR* Tianma Panel Error Writing DSI 0

[ 1.183439] imx_sec_dsim_drv 32e10000.mipi_dsi: wait pkthdr tx done time out

[ 1.183448] panel-tianma-tm043yvgp44 32e10000.mipi_dsi.0: [drm:tianma_panel_enable] *ERROR* Tianma Panel Error Writing DSI 1

[ 1.439435] imx_sec_dsim_drv 32e10000.mipi_dsi: wait pkthdr tx done time out

[ 1.439444] panel-tianma-tm043yvgp44 32e10000.mipi_dsi.0: [drm:tianma_panel_enable] *ERROR* Tianma Panel Error Writing DSI 2

[ 1.695445] imx_sec_dsim_drv 32e10000.mipi_dsi: wait pkthdr tx done time out

[ 1.695453] panel-tianma-tm043yvgp44 32e10000.mipi_dsi.0: [drm:tianma_panel_enable] *ERROR* Tianma Panel Error Writing DSI 3

[ 1.951433] imx_sec_dsim_drv 32e10000.mipi_dsi: wait pkthdr tx done time out

[ 1.951441] panel-tianma-tm043yvgp44 32e10000.mipi_dsi.0: [drm:tianma_panel_enable] *ERROR* Tianma Panel Error Writing DSI 4

[ 2.207433] imx_sec_dsim_drv 32e10000.mipi_dsi: wait pkthdr tx done time out

[ 2.207441] panel-tianma-tm043yvgp44 32e10000.mipi_dsi.0: [drm:tianma_panel_enable] *ERROR* Tianma Panel Error Writing DSI 5

[ 2.463443] imx_sec_dsim_drv 32e10000.mipi_dsi: wait pkthdr tx done time out

[ 2.463451] panel-tianma-tm043yvgp44 32e10000.mipi_dsi.0: [drm:tianma_panel_enable] *ERROR* Tianma Panel Error Writing DSI 6

[ 2.719441] imx_sec_dsim_drv 32e10000.mipi_dsi: wait pkthdr tx done time out

[ 2.719449] panel-tianma-tm043yvgp44 32e10000.mipi_dsi.0: [drm:tianma_panel_enable] *ERROR* Tianma Panel Error Writing DSI 7

[ 2.975451] imx_sec_dsim_drv 32e10000.mipi_dsi: wait pkthdr tx done time out

[ 2.975459] panel-tianma-tm043yvgp44 32e10000.mipi_dsi.0: [drm:tianma_panel_enable] *ERROR* Tianma Panel Error Writing DSI 8

[ 3.231430] imx_sec_dsim_drv 32e10000.mipi_dsi: wait pkthdr tx done time out

[ 3.231438] panel-tianma-tm043yvgp44 32e10000.mipi_dsi.0: [drm:tianma_panel_enable] *ERROR* Tianma Panel Error Writing DSI 9

[ 3.487458] imx_sec_dsim_drv 32e10000.mipi_dsi: wait pkthdr tx done time out

[ 3.487466] panel-tianma-tm043yvgp44 32e10000.mipi_dsi.0: [drm:tianma_panel_enable] *ERROR* Tianma Panel Error Writing DSI a

[ 3.743437] imx_sec_dsim_drv 32e10000.mipi_dsi: wait pkthdr tx done time out

[ 3.743445] panel-tianma-tm043yvgp44 32e10000.mipi_dsi.0: [drm:tianma_panel_enable] *ERROR* Tianma Panel Error Writing DSI b

[ 3.999435] imx_sec_dsim_drv 32e10000.mipi_dsi: wait pkthdr tx done time out

[ 3.999443] panel-tianma-tm043yvgp44 32e10000.mipi_dsi.0: [drm:tianma_panel_enable] *ERROR* Tianma Panel Error Writing DSI c

[ 4.255436] imx_sec_dsim_drv 32e10000.mipi_dsi: wait pkthdr tx done time out

[ 4.255444] panel-tianma-tm043yvgp44 32e10000.mipi_dsi.0: [drm:tianma_panel_enable] *ERROR* Tianma Panel Error Writing DSI d

[ 4.511455] imx_sec_dsim_drv 32e10000.mipi_dsi: wait pkthdr tx done time out

[ 4.511464] panel-tianma-tm043yvgp44 32e10000.mipi_dsi.0: [drm:tianma_panel_enable] *ERROR* Tianma Panel Error Writing DSI e

[ 4.511732] SError Interrupt on CPU2, code 0xbf000002 -- SError

[ 4.511735] CPU: 2 PID: 51 Comm: kworker/2:1 Not tainted 5.4.210 #1

[ 4.511736] Hardware name: FSL i.MX8MM LPDDR4 Titan board (DT)

[ 4.511738] Workqueue: events deferred_probe_work_func

[ 4.511741] pstate: 60000005 (nZCv daif -PAN -UAO)

[ 4.511742] pc : _raw_spin_unlock_irq+0x1c/0x48

[ 4.511744] lr : wait_for_completion_timeout+0x8c/0x110

[ 4.511745] sp : ffff800012f1b2d0

[ 4.511746] x29: ffff800012f1b2d0 x28: ffff800010fe8098

[ 4.511749] x27: ffff0000ff7fcee8 x26: ffff800011305910

[ 4.511752] x25: ffff800011294638 x24: ffff0000f8425580

[ 4.511755] x23: 0000000000000002 x22: ffff0000f8425580

[ 4.511759] x21: ffff0000f45d9df8 x20: ffff0000f45d9df0

[ 4.511762] x19: 000000000000003f x18: 0000000000000020

[ 4.511765] x17: 0000000000000000 x16: 0000000000000000

[ 4.511768] x15: ffff800012a43000 x14: 205d656c62616e65

[ 4.511771] x13: 5f6c656e61705f61 x12: 6d6e6169743a6d72

[ 4.511774] x11: 645b203a302e6973 x10: 645f6970696d2e30

[ 4.511777] x9 : 3030303165323320 x8 : 0000000000000000

[ 4.511780] x7 : 0000000000000000 x6 : 0000000003e1c9c4

[ 4.511783] x5 : 0000000000000001 x4 : ffff0000f45d9e00

[ 4.511786] x3 : ffff0000f8425580 x2 : ffff800012f1b328

[ 4.511789] x1 : ffff0000f8425580 x0 : 0000000100000001

[ 4.511793] Kernel panic - not syncing: Asynchronous SError Interrupt

[ 4.511795] CPU: 2 PID: 51 Comm: kworker/2:1 Not tainted 5.4.210 #1

[ 4.511797] Hardware name: FSL i.MX8MM LPDDR4 Titan board (DT)

[ 4.511798] Workqueue: events deferred_probe_work_func

[ 4.511800] Call trace:

[ 4.511801] dump_backtrace+0x0/0x188

[ 4.511803] show_stack+0x14/0x20

[ 4.511804] dump_stack+0xb4/0x110

[ 4.511805] panic+0x15c/0x328

[ 4.511806] nmi_panic+0x84/0x88

[ 4.511807] arm64_serror_panic+0x74/0x80

[ 4.511809] do_serror+0x80/0x138

[ 4.511810] el1_error+0x84/0xf8

[ 4.511811] _raw_spin_unlock_irq+0x1c/0x48

[ 4.511813] sec_mipi_dsim_host_transfer+0x1a4/0x428

[ 4.511814] mipi_dsi_device_transfer.isra.0+0x48/0x58

[ 4.511816] mipi_dsi_generic_write+0x68/0xa0

[ 4.511817] tianma_panel_enable+0x114/0x320

[ 4.511818] drm_panel_enable+0x24/0x38

[ 4.511820] sec_mipi_dsim_bridge_enable+0x328/0x470

[ 4.511821] drm_atomic_bridge_enable+0x4c/0x68

[ 4.511823] drm_atomic_helper_commit_modeset_enables+0x11c/0x230

[ 4.511825] lcdif_drm_atomic_commit_tail+0x2c/0x68

[ 4.511826] commit_tail+0x9c/0x188

[ 4.511827] drm_atomic_helper_commit+0x154/0x168

[ 4.511829] drm_atomic_commit+0x48/0x58

[ 4.511830] drm_client_modeset_commit_atomic.isra.0+0x174/0x230

[ 4.511832] drm_client_modeset_commit_force+0x58/0x190

[ 4.511833] drm_fb_helper_restore_fbdev_mode_unlocked+0x70/0xd0

[ 4.511835] drm_fb_helper_set_par+0x2c/0x58

[ 4.511836] fbcon_init+0x244/0x4c8

[ 4.511837] visual_init+0xac/0x100

[ 4.511839] do_bind_con_driver+0x1cc/0x3a0

[ 4.511840] do_take_over_console+0x13c/0x1f8

[ 4.511841] do_fbcon_takeover+0x6c/0xe0

[ 4.511843] fbcon_fb_registered+0xfc/0x110

[ 4.511844] register_framebuffer+0x1e8/0x330

[ 4.511846] __drm_fb_helper_initial_config_and_unlock+0x2d0/0x470

[ 4.511847] drm_fbdev_client_hotplug+0xd4/0x188

[ 4.511849] drm_fbdev_generic_setup+0x98/0x140

[ 4.511850] imx_drm_bind+0x100/0x150

[ 4.511852] try_to_bring_up_master+0x164/0x1c8

[ 4.511853] __component_add+0xa0/0x168

[ 4.511854] component_add+0x10/0x18

[ 4.511855] imx_sec_dsim_probe+0x4c/0x70

[ 4.511857] platform_drv_probe+0x50/0xa0

[ 4.511858] really_probe+0xd4/0x318

[ 4.511859] driver_probe_device+0x54/0xe8

[ 4.511861] __device_attach_driver+0x80/0xb8

[ 4.511862] bus_for_each_drv+0x74/0xc0

[ 4.511863] __device_attach+0xf0/0x180

[ 4.511865] device_initial_probe+0x10/0x18

[ 4.511866] bus_probe_device+0x90/0x98

[ 4.511867] deferred_probe_work_func+0x64/0x98

[ 4.511869] process_one_work+0x1b4/0x328

[ 4.511870] worker_thread+0x1f0/0x420

[ 4.511871] kthread+0x138/0x158

[ 4.511873] ret_from_fork+0x10/0x1c

[ 4.511990] SMP: stopping secondary CPUs

[ 4.511991] Kernel Offset: disabled

[ 4.511993] CPU features: 0x00002,2000200c

[ 4.511994] Memory Limit: none

Re: imx8 mini MIPI video 1Gbps clock setting question

lydia_ziegler — Mon, 07 Apr 2025 13:17:25 GMT

Hi @sutton_kim

I found an article that may help you. Can you take a look at this:

https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/Setting-i-MX8M-Mini-and-Nano-MIPI-DPHY-Clock/ta-p/1104457

Thanks,

Lydia

i.MX ProcessorsのトピックRe: imx8 mini MIPI video 1Gbps clock setting question

imx8 mini MIPI video 1Gbps clock setting question

Re: imx8 mini MIPI video 1Gbps clock setting question