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<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic imx8ulp m33 core gpio in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2075008#M235947</link>
    <description>&lt;P&gt;&lt;STRONG&gt;my dts configure is:&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;rpmsg_gpioa: gpio@0 {&lt;BR /&gt;compatible = "fsl,imx-rpmsg-gpio";&lt;BR /&gt;port_idx = &amp;lt;0&amp;gt;;&lt;BR /&gt;gpio-controller;&lt;BR /&gt;#gpio-cells = &amp;lt;2&amp;gt;;&lt;BR /&gt;#interrupt-cells = &amp;lt;2&amp;gt;;&lt;BR /&gt;interrupt-controller;&lt;BR /&gt;interrupt-parent = &amp;lt;&amp;amp;rpmsg_gpioa&amp;gt;;&lt;BR /&gt;status = "okay";&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;and when the system start , i do the command below&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;gpioget -c gpiochip0 0&lt;/P&gt;&lt;P&gt;[ 1387.700991] gpio_rpmsg virtio0.rpmsg-io-channel.-1.4: rpmsg not ack 1!&lt;BR /&gt;gpioget: unable to request lines: Invalid argument&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;I sure the&amp;nbsp;gpiochip0 is the&amp;nbsp;gpioa,&amp;nbsp;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;how&amp;nbsp; can I control the m33 gpio?&lt;/STRONG&gt;&lt;/P&gt;</description>
    <pubDate>Mon, 07 Apr 2025 09:03:39 GMT</pubDate>
    <dc:creator>tangchao90</dc:creator>
    <dc:date>2025-04-07T09:03:39Z</dc:date>
    <item>
      <title>imx8ulp m33 core gpio</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2075008#M235947</link>
      <description>&lt;P&gt;&lt;STRONG&gt;my dts configure is:&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;rpmsg_gpioa: gpio@0 {&lt;BR /&gt;compatible = "fsl,imx-rpmsg-gpio";&lt;BR /&gt;port_idx = &amp;lt;0&amp;gt;;&lt;BR /&gt;gpio-controller;&lt;BR /&gt;#gpio-cells = &amp;lt;2&amp;gt;;&lt;BR /&gt;#interrupt-cells = &amp;lt;2&amp;gt;;&lt;BR /&gt;interrupt-controller;&lt;BR /&gt;interrupt-parent = &amp;lt;&amp;amp;rpmsg_gpioa&amp;gt;;&lt;BR /&gt;status = "okay";&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;and when the system start , i do the command below&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;gpioget -c gpiochip0 0&lt;/P&gt;&lt;P&gt;[ 1387.700991] gpio_rpmsg virtio0.rpmsg-io-channel.-1.4: rpmsg not ack 1!&lt;BR /&gt;gpioget: unable to request lines: Invalid argument&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;I sure the&amp;nbsp;gpiochip0 is the&amp;nbsp;gpioa,&amp;nbsp;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;how&amp;nbsp; can I control the m33 gpio?&lt;/STRONG&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 07 Apr 2025 09:03:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2075008#M235947</guid>
      <dc:creator>tangchao90</dc:creator>
      <dc:date>2025-04-07T09:03:39Z</dc:date>
    </item>
    <item>
      <title>Re: imx8ulp m33 core gpio</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2075583#M236021</link>
      <description>&lt;P&gt;Hello,&lt;BR /&gt;&lt;BR /&gt;For the default m33 binary(power mode switch demo), this demo only register these two pins in sdk.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Zhiming_Liu_0-1744076490985.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/331741i35B2A4B5817ABD8C/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Zhiming_Liu_0-1744076490985.png" alt="Zhiming_Liu_0-1744076490985.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Linux side test:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Zhiming_Liu_1-1744076503152.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/331742i6FEBAB3E6DC57D91/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Zhiming_Liu_1-1744076503152.png" alt="Zhiming_Liu_1-1744076503152.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;You need register any gpios in sdk manually.&lt;/P&gt;
&lt;P&gt;&lt;BR /&gt;&lt;BR /&gt;Best Regards,&lt;BR /&gt;Zhiming&lt;/P&gt;</description>
      <pubDate>Tue, 08 Apr 2025 01:43:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2075583#M236021</guid>
      <dc:creator>Zhiming_Liu</dc:creator>
      <dc:date>2025-04-08T01:43:20Z</dc:date>
    </item>
    <item>
      <title>Re: imx8ulp m33 core gpio</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2075707#M236028</link>
      <description>&lt;P&gt;hello&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; Great, i can do it also!&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; "gpioget -c gpiochip1 5" can work well&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; "gpioset -c gpiochip1 5=1" but this command is blocked, I don't know why&lt;/P&gt;</description>
      <pubDate>Tue, 08 Apr 2025 04:11:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2075707#M236028</guid>
      <dc:creator>tangchao90</dc:creator>
      <dc:date>2025-04-08T04:11:23Z</dc:date>
    </item>
    <item>
      <title>Re: imx8ulp m33 core gpio</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2075720#M236031</link>
      <description>&lt;P&gt;Hello,&lt;BR /&gt;&lt;BR /&gt;This gpio is setting as interrput pin for touchscreen in&amp;nbsp;&lt;SPAN&gt;GPIOB_INT0_IRQHandler. If you need to test m33 rpmsg gpio setting, please register another unused pin in&amp;nbsp;app_srtm.c&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;BR /&gt;Best Regards,&lt;BR /&gt;Zhiming&lt;/P&gt;</description>
      <pubDate>Tue, 08 Apr 2025 04:42:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2075720#M236031</guid>
      <dc:creator>Zhiming_Liu</dc:creator>
      <dc:date>2025-04-08T04:42:46Z</dc:date>
    </item>
    <item>
      <title>Re: imx8ulp m33 core gpio</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2077803#M236143</link>
      <description>&lt;P&gt;hello Zhiming&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; i have a try, i use the demo of&amp;nbsp;&amp;nbsp;boards/evkmimx8ulp/driver_examples/rgpio/led_output&lt;/P&gt;&lt;P&gt;i change the&amp;nbsp;GPIOE6 to&amp;nbsp;GPIOC0, the gpio may be&amp;nbsp;taking turns to shine，but it's not!&amp;nbsp;&lt;/P&gt;&lt;P&gt;diff --git a/boards/evkmimx8ulp/driver_examples/rgpio/led_output/cm33/app.h b/boards/evkmimx8ulp/driver_examples/rgpio/led_output/cm33/app.h&lt;BR /&gt;index 6589748..c7857db 100644&lt;BR /&gt;--- a/boards/evkmimx8ulp/driver_examples/rgpio/led_output/cm33/app.h&lt;BR /&gt;+++ b/boards/evkmimx8ulp/driver_examples/rgpio/led_output/cm33/app.h&lt;BR /&gt;@@ -11,8 +11,8 @@&lt;BR /&gt;* Definitions&lt;BR /&gt;******************************************************************************/&lt;BR /&gt;/*${macro:start}*/&lt;BR /&gt;-#define BOARD_LED_RGPIO GPIOE&lt;BR /&gt;-#define BOARD_LED_RGPIO_PIN 6U&lt;BR /&gt;+#define BOARD_LED_RGPIO GPIOC&lt;BR /&gt;+#define BOARD_LED_RGPIO_PIN 0U&lt;BR /&gt;/*${macro:end}*/&lt;/P&gt;&lt;P&gt;/*******************************************************************************&lt;BR /&gt;diff --git a/boards/evkmimx8ulp/driver_examples/rgpio/led_output/cm33/pin_mux.c b/boards/evkmimx8ulp/driver_examples/rgpio/led_output/cm33/pin_mux.c&lt;BR /&gt;index b87442f..485879e 100644&lt;BR /&gt;--- a/boards/evkmimx8ulp/driver_examples/rgpio/led_output/cm33/pin_mux.c&lt;BR /&gt;+++ b/boards/evkmimx8ulp/driver_examples/rgpio/led_output/cm33/pin_mux.c&lt;BR /&gt;@@ -82,7 +82,7 @@ BOARD_InitLedPins:&lt;BR /&gt;*&lt;BR /&gt;* END ****************************************************************************************************************/&lt;BR /&gt;void BOARD_InitLedPins(void) { /*!&amp;lt; Function assigned for the core: Cortex-M33[cm33] */&lt;BR /&gt;- IOMUXC_SetPinMux(IOMUXC_PTE6_PTE6, 0U);&lt;BR /&gt;+ IOMUXC_SetPinMux(IOMUXC_PTC0_PTC0, 0U);&lt;BR /&gt;}&lt;/P&gt;</description>
      <pubDate>Thu, 10 Apr 2025 00:41:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2077803#M236143</guid>
      <dc:creator>tangchao90</dc:creator>
      <dc:date>2025-04-10T00:41:39Z</dc:date>
    </item>
    <item>
      <title>Re: imx8ulp m33 core gpio</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2077909#M236154</link>
      <description>&lt;P&gt;我的SDK版本信息 &amp;lt;ksdk:manifest xmlns:ksdk="&lt;A href="http://nxp.com/ksdk/2.0/ksdk_manifest_v3.0.xsd" target="_blank"&gt;http://nxp.com/ksdk/2.0/ksdk_manifest_v3.0.xsd&lt;/A&gt;" xmlns:xsi="&lt;A href="http://www.w3.org/2001/XMLSchema-instance" target="_blank"&gt;http://www.w3.org/2001/XMLSchema-instance&lt;/A&gt;" id="SDK_2.x_MIMX8UD7xxx08" name="MIMX8UD7xxx08" brief="This is SDK version 24.12.00 manifest file. It describes the content of the MIMX8UD7xxx08 and additional settings for tools that support SDK version 24.12.00" format_version="3.15" api_version="2.0.0" configuration="bfc65bba44094a9ec982e114485cebdd" xsi:schemaLocation="&lt;A href="http://nxp.com/ksdk/2.0/ksdk_manifest_v3.0.xsd" target="_blank"&gt;http://nxp.com/ksdk/2.0/ksdk_manifest_v3.0.xsd&lt;/A&gt; &lt;A href="http://nxp.com/mcuxpresso/sdk/sdk_manifest_v3.15.xsd" target="_blank"&gt;http://nxp.com/mcuxpresso/sdk/sdk_manifest_v3.15.xsd&lt;/A&gt;"&amp;gt;&lt;/P&gt;</description>
      <pubDate>Thu, 10 Apr 2025 03:33:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2077909#M236154</guid>
      <dc:creator>tangchao90</dc:creator>
      <dc:date>2025-04-10T03:33:07Z</dc:date>
    </item>
    <item>
      <title>Re: imx8ulp m33 core gpio</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2077953#M236156</link>
      <description>&lt;P&gt;我这边验证过了，需要修改atf，把GPIOC的时钟打开。&lt;/P&gt;
&lt;P&gt;plat/imx/imx8ulp/imx8ulp_bl31_setup.c&lt;/P&gt;
&lt;LI-CODE lang="markup"&gt;	mmio_write_32(0x28091000 + 0xbc, 0xc0000000);
	mmio_write_32(0x28820010, 0xffffffff);
	mmio_write_32(0x28820014, 0x3);
	mmio_write_32(0x28820018, 0xffffffff);
	mmio_write_32(0x2882001c, 0x3);&lt;/LI-CODE&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Zhiming_Liu_0-1744261178942.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/332394i5E708372B92E2F8B/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Zhiming_Liu_0-1744261178942.png" alt="Zhiming_Liu_0-1744261178942.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 10 Apr 2025 05:00:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2077953#M236156</guid>
      <dc:creator>Zhiming_Liu</dc:creator>
      <dc:date>2025-04-10T05:00:44Z</dc:date>
    </item>
    <item>
      <title>Re: imx8ulp m33 core gpio</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2080464#M236315</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/151788"&gt;@Zhiming_Liu&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;I want to use lpuart polling example on SDK, the demo_example is LPUART1, but I want to use LPUART2.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;How to config&amp;nbsp;&lt;SPAN&gt;PCC_REG&lt;/SPAN&gt;&lt;SPAN&gt;(kCLOCK_Lpuart2)?I read reg of LPUART1&amp;nbsp; and LPUART2 CLOCK, result is 0xd2000000 and 0.I guess&amp;nbsp;&lt;SPAN&gt;the system has configured the LPUART clock with default settings.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 15 Apr 2025 05:39:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2080464#M236315</guid>
      <dc:creator>wendy-liu</dc:creator>
      <dc:date>2025-04-15T05:39:51Z</dc:date>
    </item>
    <item>
      <title>Re: imx8ulp m33 core gpio</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2081158#M236359</link>
      <description>&lt;P&gt;Hello,&lt;BR /&gt;&lt;BR /&gt;Please use other clock as source, then continue debug, you may need to configure trdc&amp;nbsp; for edma access like LPUART1 in&amp;nbsp;&amp;nbsp;&lt;SPAN&gt;BOARD_SetTrdcGlobalConfig&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;BR /&gt;&lt;BR /&gt;Best Regards,&lt;BR /&gt;Zhiming&lt;/P&gt;</description>
      <pubDate>Wed, 16 Apr 2025 00:11:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2081158#M236359</guid>
      <dc:creator>Zhiming_Liu</dc:creator>
      <dc:date>2025-04-16T00:11:07Z</dc:date>
    </item>
    <item>
      <title>Re: imx8ulp m33 core gpio</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2081294#M236364</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/151788"&gt;@Zhiming_Liu&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; According to your suggestion, I add some configutation in&amp;nbsp;&lt;/P&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;STRONG&gt;voidBOARD_SetTrdcGlobalConfig(void) &lt;/STRONG&gt;as below:&lt;/DIV&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; /* non secure state can access lpuart2(PBridge2 slot 11, T-MBC3) for eDMA0 */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;mbcBlockConfig&lt;/SPAN&gt;&lt;SPAN&gt;.&lt;/SPAN&gt;&lt;SPAN&gt;memoryAccessControlSelect&lt;/SPAN&gt; &lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;TRDC_MBC_ACCESS_CONTROL_POLICY_ALL_INDEX&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;mbcBlockConfig&lt;/SPAN&gt;&lt;SPAN&gt;.&lt;/SPAN&gt;&lt;SPAN&gt;nseEnable&lt;/SPAN&gt;&lt;SPAN&gt; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;true&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;SPAN&gt; /* non secure state can access the block for eDMA0 */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;mbcBlockConfig&lt;/SPAN&gt;&lt;SPAN&gt;.&lt;/SPAN&gt;&lt;SPAN&gt;mbcIdx&lt;/SPAN&gt;&lt;SPAN&gt; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;3U&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;SPAN&gt; &amp;nbsp; /* MBC3 */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;mbcBlockConfig&lt;/SPAN&gt;&lt;SPAN&gt;.&lt;/SPAN&gt;&lt;SPAN&gt;domainIdx&lt;/SPAN&gt;&lt;SPAN&gt; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;TRDC_DMA0_DOMAIN_ID&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;SPAN&gt; /* MBC2_DOM0 */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;mbcBlockConfig&lt;/SPAN&gt;&lt;SPAN&gt;.&lt;/SPAN&gt;&lt;SPAN&gt;slaveMemoryIdx&lt;/SPAN&gt;&lt;SPAN&gt; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;0U&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;SPAN&gt; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;/* MBC3_DOM0_MEM0 */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;mbcBlockConfig&lt;/SPAN&gt;&lt;SPAN&gt;.&lt;/SPAN&gt;&lt;SPAN&gt;memoryBlockIdx&lt;/SPAN&gt;&lt;SPAN&gt; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;11U&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;SPAN&gt; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; /* MBC3_DOM0_MEM0_BLK_CFG_W11 */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;TRDC_MbcSetMemoryBlockConfig&lt;/SPAN&gt;&lt;SPAN&gt;(TRDC, &lt;/SPAN&gt;&lt;SPAN&gt;&amp;amp;&lt;/SPAN&gt;&lt;SPAN&gt;mbcBlockConfig&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&lt;SPAN&gt;But the result is that I don't&amp;nbsp;read reg of LPUART2[&lt;STRONG&gt;PCC_REG(&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&lt;STRONG&gt;kCLOCK_Lpuart2). &lt;/STRONG&gt;It means the Peripheral is not present...&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;STRONG&gt;Is there any new information on this?&lt;/STRONG&gt;Looking forward to your reply!&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;</description>
      <pubDate>Wed, 16 Apr 2025 03:21:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2081294#M236364</guid>
      <dc:creator>wendy-liu</dc:creator>
      <dc:date>2025-04-16T03:21:50Z</dc:date>
    </item>
    <item>
      <title>Re: imx8ulp m33 core gpio</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2082323#M236436</link>
      <description>&lt;P&gt;hello! &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/151788"&gt;@Zhiming_Liu&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;我刚刚又看了SDK中dsp_examples的sample code，他们的做法是在CM33上初始化DSP及硬件资源，启动DSP core；将实现的代码逻辑放在DSP core，通过MU进行通信。&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;我想确认一下，如果想在CM33使用LPUART2，只能通过这种方式吗？还是可以在CM33通过TRDC直接访问外设？&lt;/P&gt;</description>
      <pubDate>Thu, 17 Apr 2025 07:05:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2082323#M236436</guid>
      <dc:creator>wendy-liu</dc:creator>
      <dc:date>2025-04-17T07:05:16Z</dc:date>
    </item>
    <item>
      <title>Re: imx8ulp m33 core gpio</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2082351#M236439</link>
      <description>&lt;P&gt;Hello,&lt;BR /&gt;&lt;BR /&gt;理论上是可以开放Pbridge2的特定内存区域给指定domain的，控制MBC3即可，开放PCC2和LPUART2的控制权给M33。对应的LPUART2中断号也在M33中定义了。&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Zhiming_Liu_0-1744874741068.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/333624i2800A5EA5A221394/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Zhiming_Liu_0-1744874741068.png" alt="Zhiming_Liu_0-1744874741068.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;核心问题是时钟，由于这个LPUART2做在了DSP里，必须使能dsp_busclk，至少得加载dsp固件。具体的过程我还没试过。&lt;/P&gt;
&lt;P&gt;&lt;BR /&gt;Best Regards,&lt;BR /&gt;Zhiming&lt;/P&gt;</description>
      <pubDate>Thu, 17 Apr 2025 07:32:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2082351#M236439</guid>
      <dc:creator>Zhiming_Liu</dc:creator>
      <dc:date>2025-04-17T07:32:48Z</dc:date>
    </item>
    <item>
      <title>Re: imx8ulp m33 core gpio</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2082355#M236440</link>
      <description>&lt;P&gt;我读了kCLOCK_FusionDspBusClk的频率，通过CLOCK_GetFreq(kCLOCK_FusionDspBusClk)，它的频率为&lt;SPAN&gt;96000000。但是依然无法调用CLOCK_SetIpSrc()。麻烦您可以帮我再验证一下吗？谢谢！&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 17 Apr 2025 07:42:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2082355#M236440</guid>
      <dc:creator>wendy-liu</dc:creator>
      <dc:date>2025-04-17T07:42:28Z</dc:date>
    </item>
    <item>
      <title>Re: imx8ulp m33 core gpio</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2082358#M236441</link>
      <description>&lt;P&gt;PCC2和LPUART2的MBC权限我也配置了，&lt;/P&gt;&lt;P&gt;/* non secure state can access lpuart2(PBridge2 slot 11, T-MBC3) for eDMA0 */&lt;BR /&gt;mbcBlockConfig.memoryAccessControlSelect = TRDC_MBC_ACCESS_CONTROL_POLICY_ALL_INDEX;&lt;BR /&gt;mbcBlockConfig.nseEnable = true; /* non secure state can access the block for eDMA0 */&lt;BR /&gt;mbcBlockConfig.mbcIdx = 3U; /* MBC3 */&lt;BR /&gt;mbcBlockConfig.domainIdx = TRDC_DMA0_DOMAIN_ID; /* MBC3_DOM0 */&lt;BR /&gt;mbcBlockConfig.slaveMemoryIdx = 0U; /* MBC3_DOM0_MEM0 */&lt;BR /&gt;mbcBlockConfig.memoryBlockIdx = 11U; /* MBC3_DOM0_MEM0_BLK_CFG_W11 */&lt;BR /&gt;TRDC_MbcSetMemoryBlockConfig(TRDC, &amp;amp;mbcBlockConfig);&lt;/P&gt;&lt;P&gt;/* non secure state can access PCC2(PBridge2 slot 2, T-MBC3) for eDMA0 */&lt;BR /&gt;mbcBlockConfig.memoryAccessControlSelect = TRDC_MBC_ACCESS_CONTROL_POLICY_ALL_INDEX;&lt;BR /&gt;mbcBlockConfig.nseEnable = true; /* non secure state can access the block for eDMA0 */&lt;BR /&gt;mbcBlockConfig.mbcIdx = 3U; /* MBC3 */&lt;BR /&gt;mbcBlockConfig.domainIdx = TRDC_DMA0_DOMAIN_ID; /* MBC3_DOM0 */&lt;BR /&gt;mbcBlockConfig.slaveMemoryIdx = 0U; /* MBC3_DOM0_MEM0 */&lt;BR /&gt;mbcBlockConfig.memoryBlockIdx = 2U; /* MBC3_DOM0_MEM0_BLK_CFG_W2 */&lt;BR /&gt;TRDC_MbcSetMemoryBlockConfig(TRDC, &amp;amp;mbcBlockConfig);&lt;/P&gt;</description>
      <pubDate>Thu, 17 Apr 2025 07:44:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2082358#M236441</guid>
      <dc:creator>wendy-liu</dc:creator>
      <dc:date>2025-04-17T07:44:07Z</dc:date>
    </item>
    <item>
      <title>Re: imx8ulp m33 core gpio</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2082371#M236442</link>
      <description>&lt;P&gt;你这个用的不对&lt;SPAN&gt;TRDC_DMA0_DOMAIN_ID，这两个外设应该给M33 domain：&lt;/SPAN&gt;&lt;SPAN&gt;TRDC_M33_DOMAIN_ID&lt;/SPAN&gt;&lt;/P&gt;
&lt;DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;&lt;SPAN&gt;另外你可能需要把board.c 1010行的这个段打开：&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;LI-CODE lang="markup"&gt;#if 0
        /* 5. Assign domain ID for m33  */
        trdc_processor_domain_assignment_t domainAssignment;

        TRDC_GetDefaultProcessorDomainAssignment(&amp;amp;domainAssignment);
        domainAssignment.domainId = TRDC_M33_DOMAIN_ID;

        TRDC_SetProcessorDomainAssignment(TRDC, &amp;amp;domainAssignment);
#endif&lt;/LI-CODE&gt;&lt;/DIV&gt;
&lt;/DIV&gt;</description>
      <pubDate>Thu, 17 Apr 2025 07:56:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2082371#M236442</guid>
      <dc:creator>Zhiming_Liu</dc:creator>
      <dc:date>2025-04-17T07:56:12Z</dc:date>
    </item>
    <item>
      <title>Re: imx8ulp m33 core gpio</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2082405#M236448</link>
      <description>&lt;P&gt;我按照你的建议修改了代码，CLOCK_SetIpSrc还是会报错，kCLOCK_Lpuart2的寄存器读出来还是0.&lt;/P&gt;&lt;P&gt;附上我的patch供参考。麻烦帮我再看一下，谢谢！！&lt;/P&gt;</description>
      <pubDate>Thu, 17 Apr 2025 08:43:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2082405#M236448</guid>
      <dc:creator>wendy-liu</dc:creator>
      <dc:date>2025-04-17T08:43:31Z</dc:date>
    </item>
    <item>
      <title>Re: imx8ulp m33 core gpio</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2083435#M236494</link>
      <description>&lt;P&gt;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/151788"&gt;@Zhiming_Liu&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Hello！我有了一些新的进展，我调用&lt;SPAN&gt;CLOCK_SetIpSrc成功设置了时钟，也&lt;/SPAN&gt;读到了&lt;SPAN&gt;kCLOCK_Lpuart2，为0x80000000。但是我在while循环调用LPUART_WriteByte(DEMO_LPUART, 0xaa)接口往串口写数据，调用LPUART_ReadByte(DEMO_LPUART)读数据。却没有读到数据，波形也没测量到。用串口调试助手发数据能接收到，说明硬件是没问题的。我下一步应该往什么方向排查呢？谢谢！附件为我的patch。&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Sat, 19 Apr 2025 08:48:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2083435#M236494</guid>
      <dc:creator>wendy-liu</dc:creator>
      <dc:date>2025-04-19T08:48:10Z</dc:date>
    </item>
    <item>
      <title>Re: imx8ulp m33 core gpio</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2083439#M236495</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/246604"&gt;@wendy-liu&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;你现在能在串口看到打印信息对吧？原来main函数的收发逻辑无法正常使用吗？demo说明有下注意事项。&lt;/P&gt;
&lt;LI-CODE lang="markup"&gt;The lpuart_polling Example project is to demonstrate usage of the KSDK lpuart driver.
In the example, you can send characters to the console back and they will be printed out onto console
 instantly.
Note: Please input one character at a time. If you input too many characters each time, the receiver may overflow
because the LPUART uses simple polling way for receiving.&lt;/LI-CODE&gt;
&lt;P&gt;&lt;BR /&gt;不行你就把LPUART2的寄存器 dump出来，然后和LPUART1的比较一下差异吧。&lt;BR /&gt;&lt;BR /&gt;Best Regards,&lt;BR /&gt;Zhiming&lt;/P&gt;</description>
      <pubDate>Sat, 19 Apr 2025 09:36:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2083439#M236495</guid>
      <dc:creator>Zhiming_Liu</dc:creator>
      <dc:date>2025-04-19T09:36:33Z</dc:date>
    </item>
    <item>
      <title>Re: imx8ulp m33 core gpio</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2083440#M236496</link>
      <description>&lt;P&gt;是的，我刚打印了，我发现状态寄存器有点问题。发数据的时候TDRE和TC这两位都是0。&lt;/P&gt;</description>
      <pubDate>Sat, 19 Apr 2025 09:38:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2083440#M236496</guid>
      <dc:creator>wendy-liu</dc:creator>
      <dc:date>2025-04-19T09:38:08Z</dc:date>
    </item>
    <item>
      <title>Re: imx8ulp m33 core gpio</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2083442#M236497</link>
      <description>&lt;P&gt;Hello,&lt;BR /&gt;&lt;BR /&gt;LPUART1的PCC REG是&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Zhiming_Liu_0-1745056559976.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/333953iB565F8B08C52E7CC/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Zhiming_Liu_0-1745056559976.png" alt="Zhiming_Liu_0-1745056559976.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;DIV id="tinyMceEditorZhiming_Liu_4" class="mceNonEditable lia-copypaste-placeholder"&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;P&gt;你读出来的LPUART2的REG只有第31是1，你把这个寄存器读取放到RESET_PeripheralReset之后再读一次看看？&lt;/P&gt;
&lt;P&gt;还有：&lt;SPAN&gt;BOARD_InitDebugConsole中会用到LPUART1的这些宏，你都改成2了吗？&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;DIV&gt;
&lt;DIV&gt;&lt;SPAN&gt;/* The UART to use for debug messages. */&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; BOARD_DEBUG_UART_TYPE kSerialPort_Uart&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; BOARD_DEBUG_UART_BAUDRATE &lt;/SPAN&gt;&lt;SPAN&gt;115200u&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; BOARD_DEBUG_UART_BASEADDR LPUART1_BASE&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; BOARD_DEBUG_UART_INSTANCE &lt;/SPAN&gt;&lt;SPAN&gt;1U&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; BOARD_DEBUG_UART_CLK_FREQ &lt;/SPAN&gt;&lt;SPAN&gt;CLOCK_GetLpuartClkFreq&lt;/SPAN&gt;&lt;SPAN&gt;(BOARD_DEBUG_UART_INSTANCE)&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; BOARD_DEBUG_UART_IP_NAME kCLOCK_Lpuart1&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; BOARD_DEBUG_UART_CLKSRC kCLOCK_Pcc1BusIpSrcSysOscDiv2&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; BOARD_DEBUG_UART_RESET kRESET_Lpuart1&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; BOARD_UART_IRQ LPUART1_IRQn&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; BOARD_UART_IRQ_HANDLER LPUART1_IRQHandler&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;/DIV&gt;
&lt;DIV&gt;
&lt;DIV&gt;&lt;SPAN&gt;void&lt;/SPAN&gt; &lt;SPAN&gt;BOARD_InitDebugConsole&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;void&lt;/SPAN&gt;&lt;SPAN&gt;)&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;SPAN&gt;uint32_t&lt;/SPAN&gt;&lt;SPAN&gt; uartClkSrcFreq;&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;BR /&gt;
&lt;DIV&gt;&lt;SPAN&gt;CLOCK_SetIpSrc&lt;/SPAN&gt;&lt;SPAN&gt;(BOARD_DEBUG_UART_IP_NAME, BOARD_DEBUG_UART_CLKSRC);&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;SPAN&gt; uartClkSrcFreq = BOARD_DEBUG_UART_CLK_FREQ;&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;SPAN&gt;RESET_PeripheralReset&lt;/SPAN&gt;&lt;SPAN&gt;(BOARD_DEBUG_UART_RESET);&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;BR /&gt;
&lt;DIV&gt;&lt;SPAN&gt;DbgConsole_Init&lt;/SPAN&gt;&lt;SPAN&gt;(BOARD_DEBUG_UART_INSTANCE, BOARD_DEBUG_UART_BAUDRATE, BOARD_DEBUG_UART_TYPE, uartClkSrcFreq);&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;/DIV&gt;
&lt;P&gt;&lt;BR /&gt;Best Regards,&lt;BR /&gt;Zhiming&lt;/P&gt;</description>
      <pubDate>Sat, 19 Apr 2025 10:03:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8ulp-m33-core-gpio/m-p/2083442#M236497</guid>
      <dc:creator>Zhiming_Liu</dc:creator>
      <dc:date>2025-04-19T10:03:12Z</dc:date>
    </item>
  </channel>
</rss>

