i.MX93 Linux How to set MDIO speed

PBoerner — Fri, 21 Mar 2025 14:03:22 GMT

We are using a custom board with the i.MX93 which uses the ENET-QOS ethernet interface running on kernel 6.6.52. In principle it works well but now we want to reduce the clock for the MDIO communication.

The entry in the devicetree is the following:

&eqos {
   pinctrl-names = "default";
   pinctrl-0 = <&pinctrl_eqos>;
   phy-mode = "rmii";
   phy-handle = <&ethphy1>;
   assigned-clock-rates = <100000000>, <50000000>;
   snps,rmii_refclk_ext;
   status = "okay";

   mdio {
     compatible = "snps,dwmac-mdio";
     #address-cells = <1>;
     #size-cells = <0>;
     clock-frequency = <1000000>;

     ethphy1: ethernet-phy@6 {
        compatible = "ethernet-phy-ieee802.3-c22";
        reg = <6>;
        eee-broken-1000t;
        reset-gpios = <&ioexpander_2 6 GPIO_ACTIVE_LOW>;
        reset-assert-us = <10000>;
        reset-deassert-us = <80000>;
     };
   };
};

Is there any possibility to configure the MDIO speed via the devicetree? I haven't found any hint for it. In some devicetree documentation it's stated that it can be done via clock-frequency, but none of the involved drivers is checking and using this entry. It looks a little bit like the speed is not modified at all and therefor set to a maximum speed in relation to the system clock.

If it can't be done via the devicetree, which driver should set the MDIO speed? I havent't found any related code in the involved dwmac drivers.

Re: i.MX93 Linux How to set MDIO speed

JosephAtNXP — Fri, 21 Mar 2025 16:43:56 GMT

Hi,

Thank you for your interest in NXP Semiconductor products,

MDIO speed cannot be programmed into the EQOS interface, the IP misses the register for setting the MDIO SPEED, HOLDTIME, etc.

So in EQOS is not configurable, the register is mapped in FEC though, the speed can be configured when using FEC MDIO.

Regards

topic i.MX93 Linux How to set MDIO speed in i.MX Processors

i.MX93 Linux How to set MDIO speed

Re: i.MX93 Linux How to set MDIO speed