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    <title>topic Re: RGMII PHY with IM8QM processor (Linux) in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/RGMII-PHY-with-IM8QM-processor-Linux/m-p/2064983#M235286</link>
    <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;Thank you for your interest in NXP Semiconductor products,&lt;/P&gt;
&lt;P&gt;Please refer to the &lt;A href="https://github.com/nxp-imx/linux-imx/blob/e0f9e2afd4cff3f02d71891244b4aa5899dfc786/Documentation/devicetree/bindings/net/fsl%2Cfec.yaml#L239-L266" target="_self"&gt;fec example&lt;/A&gt;.&lt;/P&gt;
&lt;P&gt;Remove the following properties.&lt;/P&gt;
&lt;LI-CODE lang="markup"&gt;fsl,mii-exclusive;
nvmem-cells = &amp;lt;&amp;amp;fec_mac0&amp;gt;;
nvmem-cell-names = "mac-address";
...
mxl,disable-autoneg = &amp;lt;1&amp;gt;; // Disable Auto negotiation
mxl,force-speed = &amp;lt;1000&amp;gt;; //  Force speed to 1Gbps&lt;/LI-CODE&gt;
&lt;P&gt;Used a &lt;A href="https://github.com/nxp-imx/linux-imx/blob/e0f9e2afd4cff3f02d71891244b4aa5899dfc786/Documentation/devicetree/bindings/net/ethernet-controller.yaml#L169-L210" target="_self"&gt;fixed link property&lt;/A&gt; for not negotiating.&lt;/P&gt;
&lt;LI-CODE lang="markup"&gt;fixed-link {
	speed = &amp;lt;1000&amp;gt;;
	full-duplex;
};&lt;/LI-CODE&gt;
&lt;P&gt;Regards&lt;/P&gt;</description>
    <pubDate>Wed, 19 Mar 2025 21:05:39 GMT</pubDate>
    <dc:creator>JosephAtNXP</dc:creator>
    <dc:date>2025-03-19T21:05:39Z</dc:date>
    <item>
      <title>RGMII PHY with IM8QM processor (Linux)</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/RGMII-PHY-with-IM8QM-processor-Linux/m-p/2064894#M235279</link>
      <description>&lt;P&gt;HI,&lt;/P&gt;&lt;P&gt;&amp;nbsp;I have a board with imx8qm processor connected to a Maxlinear PHY. The connection is as follows&lt;BR /&gt;IMX8QM &amp;lt;-- RGMII--&amp;gt; MaxLinear PHY &amp;lt;--SGMII--&amp;gt;&lt;BR /&gt;&lt;BR /&gt;What I observe is that the PHY never goes to 1G speed (despite being explicitly set). This setup is functional in 10Mbps. When I measured the clocks TXC and RXC , both were 2.5Mhz , confirming the 10Mbs speed/connection.&lt;BR /&gt;&lt;BR /&gt;Now, I have the below device tree entirees on the IMX8QM linux.&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;PRE&gt;&lt;SPAN&gt;&lt;SPAN class=""&gt;#include &amp;lt;dt-bindings/usb/pd.h&amp;gt;&lt;/SPAN&gt;&lt;/SPAN&gt;
&lt;SPAN&gt;&lt;SPAN class=""&gt;#include "imx8qp.dtsi"&lt;/SPAN&gt;&lt;/SPAN&gt;
&lt;/PRE&gt;&lt;PRE&gt;&lt;SPAN&gt;&lt;SPAN class=""&gt;&amp;amp;fec1 {&lt;/SPAN&gt;&lt;/SPAN&gt;
&lt;SPAN&gt;&lt;SPAN class=""&gt;	pinctrl-names = "default";&lt;/SPAN&gt;&lt;/SPAN&gt;
&lt;SPAN&gt;&lt;SPAN class=""&gt;	pinctrl-0 = &amp;lt;&amp;amp;pinctrl_fec1&amp;gt;;&lt;/SPAN&gt;&lt;/SPAN&gt;
&lt;SPAN&gt;&lt;SPAN class=""&gt;	phy-mode = "rgmii-txid";&lt;/SPAN&gt;&lt;/SPAN&gt;
&lt;SPAN&gt;&lt;SPAN class=""&gt;	phy-handle = &amp;lt;&amp;amp;ethphy1&amp;gt;;&lt;/SPAN&gt;&lt;/SPAN&gt;
&lt;SPAN&gt;&lt;SPAN class=""&gt;	fsl,magic-packet;&lt;/SPAN&gt;&lt;/SPAN&gt;
&lt;SPAN&gt;&lt;SPAN class=""&gt;	fsl,mii-exclusive;&lt;/SPAN&gt;&lt;/SPAN&gt;
&lt;SPAN&gt;&lt;SPAN class=""&gt;	nvmem-cells = &amp;lt;&amp;amp;fec_mac0&amp;gt;;&lt;/SPAN&gt;&lt;/SPAN&gt;
&lt;SPAN&gt;&lt;SPAN class=""&gt;	nvmem-cell-names = "mac-address";&lt;/SPAN&gt;&lt;/SPAN&gt;
&lt;SPAN&gt;&lt;SPAN class=""&gt;	rx-internal-delay-ps = &amp;lt;2000&amp;gt;;&lt;/SPAN&gt;&lt;/SPAN&gt;
&lt;SPAN&gt;&lt;SPAN class=""&gt;	status = "okay";&lt;/SPAN&gt;&lt;/SPAN&gt;

&lt;SPAN&gt;&lt;SPAN class=""&gt;	mdio {&lt;/SPAN&gt;&lt;/SPAN&gt;
&lt;SPAN&gt;&lt;SPAN class=""&gt;		#address-cells = &amp;lt;1&amp;gt;;&lt;/SPAN&gt;&lt;/SPAN&gt;
&lt;SPAN&gt;&lt;SPAN class=""&gt;		#size-cells = &amp;lt;0&amp;gt;;&lt;/SPAN&gt;&lt;/SPAN&gt;

&lt;SPAN&gt;&lt;SPAN class=""&gt;		ethphy1: ethernet-phy@1 {  // PHY connected to the MDIO bus&lt;/SPAN&gt;&lt;/SPAN&gt;
&lt;SPAN&gt;&lt;SPAN class=""&gt;            reg = &amp;lt;1&amp;gt;; // PHY address on the MDIO bus&lt;/SPAN&gt;&lt;/SPAN&gt;
&lt;SPAN&gt;&lt;SPAN class=""&gt;            compatible = "ethernet-phy-ieee802.3-c22"; // Generic PHY compatible string&lt;/SPAN&gt;&lt;/SPAN&gt;
&lt;SPAN&gt;&lt;SPAN class=""&gt;            mxl,disable-autoneg = &amp;lt;1&amp;gt;; // Disable Auto negotiation&lt;/SPAN&gt;&lt;/SPAN&gt;
&lt;SPAN&gt;&lt;SPAN class=""&gt;            mxl,force-speed = &amp;lt;1000&amp;gt;; //  Force speed to 1Gbps&lt;/SPAN&gt;&lt;/SPAN&gt;
&lt;SPAN&gt;&lt;SPAN class=""&gt;            reset-gpios = &amp;lt;&amp;amp;lsio_gpio3 3 GPIO_ACTIVE_LOW&amp;gt;; // HRST pin connected to GPIO3_IO04&lt;/SPAN&gt;&lt;/SPAN&gt;
&lt;SPAN&gt;&lt;SPAN class=""&gt;            status = "okay";&lt;/SPAN&gt;&lt;/SPAN&gt;
&lt;SPAN&gt;&lt;SPAN class=""&gt;        };&lt;/SPAN&gt;&lt;/SPAN&gt;

&lt;SPAN&gt;&lt;SPAN class=""&gt;	};&lt;/SPAN&gt;&lt;/SPAN&gt;
&lt;SPAN&gt;&lt;SPAN class=""&gt;};&lt;/SPAN&gt;&lt;/SPAN&gt;
&lt;/PRE&gt;&lt;P&gt;&amp;nbsp;My configuration requires Auto neg to be disabled and PHY speed set to 1G always.&lt;BR /&gt;What might I be doing wrong?&lt;BR /&gt;&lt;BR /&gt;Is there a way I can force the TXC/RXC to 125Mhz?&lt;BR /&gt;Or is it that the MAC sets these based on the PHY configuration after reading from the PHY Standard Status registers?&amp;nbsp;&lt;BR /&gt;Any thoughts?&lt;/P&gt;</description>
      <pubDate>Wed, 19 Mar 2025 18:31:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/RGMII-PHY-with-IM8QM-processor-Linux/m-p/2064894#M235279</guid>
      <dc:creator>mahesh_hns</dc:creator>
      <dc:date>2025-03-19T18:31:54Z</dc:date>
    </item>
    <item>
      <title>Re: RGMII PHY with IM8QM processor (Linux)</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/RGMII-PHY-with-IM8QM-processor-Linux/m-p/2064983#M235286</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;Thank you for your interest in NXP Semiconductor products,&lt;/P&gt;
&lt;P&gt;Please refer to the &lt;A href="https://github.com/nxp-imx/linux-imx/blob/e0f9e2afd4cff3f02d71891244b4aa5899dfc786/Documentation/devicetree/bindings/net/fsl%2Cfec.yaml#L239-L266" target="_self"&gt;fec example&lt;/A&gt;.&lt;/P&gt;
&lt;P&gt;Remove the following properties.&lt;/P&gt;
&lt;LI-CODE lang="markup"&gt;fsl,mii-exclusive;
nvmem-cells = &amp;lt;&amp;amp;fec_mac0&amp;gt;;
nvmem-cell-names = "mac-address";
...
mxl,disable-autoneg = &amp;lt;1&amp;gt;; // Disable Auto negotiation
mxl,force-speed = &amp;lt;1000&amp;gt;; //  Force speed to 1Gbps&lt;/LI-CODE&gt;
&lt;P&gt;Used a &lt;A href="https://github.com/nxp-imx/linux-imx/blob/e0f9e2afd4cff3f02d71891244b4aa5899dfc786/Documentation/devicetree/bindings/net/ethernet-controller.yaml#L169-L210" target="_self"&gt;fixed link property&lt;/A&gt; for not negotiating.&lt;/P&gt;
&lt;LI-CODE lang="markup"&gt;fixed-link {
	speed = &amp;lt;1000&amp;gt;;
	full-duplex;
};&lt;/LI-CODE&gt;
&lt;P&gt;Regards&lt;/P&gt;</description>
      <pubDate>Wed, 19 Mar 2025 21:05:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/RGMII-PHY-with-IM8QM-processor-Linux/m-p/2064983#M235286</guid>
      <dc:creator>JosephAtNXP</dc:creator>
      <dc:date>2025-03-19T21:05:39Z</dc:date>
    </item>
    <item>
      <title>Re: RGMII PHY with IM8QM processor (Linux)</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/RGMII-PHY-with-IM8QM-processor-Linux/m-p/2066343#M235389</link>
      <description>&lt;P&gt;I thought 'fixed-link' property is only for PHY less connection. I have a Maxlinear PHY connected (which has to load its own software driver to initialize). I am curious how fixed-link wiill help here?&lt;/P&gt;</description>
      <pubDate>Fri, 21 Mar 2025 13:20:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/RGMII-PHY-with-IM8QM-processor-Linux/m-p/2066343#M235389</guid>
      <dc:creator>mahesh_hns</dc:creator>
      <dc:date>2025-03-21T13:20:00Z</dc:date>
    </item>
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