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    <title>i.MX ProcessorsのトピックMIMXRT1170 Pending interrupts</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/MIMXRT1170-Pending-interrupts/m-p/2064924#M235280</link>
    <description>&lt;P&gt;I am trying to find a way to clear all pending interrupts in the MIMXRT1170.&amp;nbsp; I have code that erases and programs external spi flash (using the MIMXRT1170-EVK and IAR embedded workbench).&amp;nbsp; I disable interrupts before the code that erases sector by sector and programs each sector, and when the code completes, it enables interrupts and at that point the cpu resets.&amp;nbsp; If I have the IAR i-jet debugger connected and use it to load my application and without any breakpoints set I start the application, it runs perfectly (no reset).&amp;nbsp; When I change the dip switches to boot from the spi flash, the code resets upon interrupts being enabled.&amp;nbsp; Any help would be appreciated.&lt;/P&gt;</description>
    <pubDate>Wed, 19 Mar 2025 19:02:30 GMT</pubDate>
    <dc:creator>GLantzTCore</dc:creator>
    <dc:date>2025-03-19T19:02:30Z</dc:date>
    <item>
      <title>MIMXRT1170 Pending interrupts</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/MIMXRT1170-Pending-interrupts/m-p/2064924#M235280</link>
      <description>&lt;P&gt;I am trying to find a way to clear all pending interrupts in the MIMXRT1170.&amp;nbsp; I have code that erases and programs external spi flash (using the MIMXRT1170-EVK and IAR embedded workbench).&amp;nbsp; I disable interrupts before the code that erases sector by sector and programs each sector, and when the code completes, it enables interrupts and at that point the cpu resets.&amp;nbsp; If I have the IAR i-jet debugger connected and use it to load my application and without any breakpoints set I start the application, it runs perfectly (no reset).&amp;nbsp; When I change the dip switches to boot from the spi flash, the code resets upon interrupts being enabled.&amp;nbsp; Any help would be appreciated.&lt;/P&gt;</description>
      <pubDate>Wed, 19 Mar 2025 19:02:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/MIMXRT1170-Pending-interrupts/m-p/2064924#M235280</guid>
      <dc:creator>GLantzTCore</dc:creator>
      <dc:date>2025-03-19T19:02:30Z</dc:date>
    </item>
    <item>
      <title>Re: MIMXRT1170 Pending interrupts</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/MIMXRT1170-Pending-interrupts/m-p/2065249#M235307</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/231182"&gt;@GLantzTCore&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Was your code running from the same memory space? Basically when we run code to erase/program the flexspi flash, such operation should be issued from another memory space , such as ITCM or SDRAM, please kindly refer to the SDK demo of&amp;nbsp;evkbmimxrt1170_flexspi_nor_polling_transfer_cm7 for details.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Kan_Li_0-1742449226456.png" style="width: 620px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/328995iB89886ABEA1DB11B/image-dimensions/620x304?v=v2" width="620" height="304" role="button" title="Kan_Li_0-1742449226456.png" alt="Kan_Li_0-1742449226456.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Have a great day,&lt;BR /&gt;Kan&lt;/P&gt;
&lt;P&gt;&lt;BR /&gt;-------------------------------------------------------------------------------&lt;BR /&gt;Note:&lt;BR /&gt;- If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;BR /&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;BR /&gt;Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;BR /&gt;-------------------------------------------------------------------------------&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 20 Mar 2025 05:40:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/MIMXRT1170-Pending-interrupts/m-p/2065249#M235307</guid>
      <dc:creator>Kan_Li</dc:creator>
      <dc:date>2025-03-20T05:40:55Z</dc:date>
    </item>
    <item>
      <title>Re: MIMXRT1170 Pending interrupts</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/MIMXRT1170-Pending-interrupts/m-p/2065559#M235330</link>
      <description>&lt;P&gt;I am using the IAR Embedded Workbench as my tool base and this sets the named objects into a safe space to erase/program flash from.&amp;nbsp; The application I am running is located in SPI Flash as well, so I have addressed the issue of erasing/writing flash from memory.&lt;/P&gt;&lt;P&gt;initialize by copy {&lt;BR /&gt;readwrite,&lt;BR /&gt;&lt;BR /&gt;/* Explicitly place flash operation functions in RAM. */&lt;BR /&gt;object mflash_drv.o,&lt;BR /&gt;object fsl_flexspi.o,&lt;BR /&gt;object fsl_cache.o,&lt;BR /&gt;object flexspi_nor_flash_ops.o,&lt;BR /&gt;object dlUtils.o,&lt;/P&gt;&lt;P&gt;section .textrw,&lt;BR /&gt;section CodeQuickAccess,&lt;BR /&gt;section DataQuickAccess&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;The data programmed into the flash is complete as verified by a CRC that emcompasses the entire data block being written.&amp;nbsp; So it is something that happens when I re-enable interrupts.&lt;/P&gt;&lt;P&gt;the code looks something like this:&lt;/P&gt;&lt;P&gt;asm("CPSID I"); //Mask interrupts&lt;/P&gt;&lt;P&gt;flexspi_nor_flash_init(SPIFLASH_BASE);&lt;/P&gt;&lt;P&gt;numSectors = (dataLen / SECTOR_SIZE);&lt;BR /&gt;if ((dataLen % SECTOR_SIZE) != 0)&lt;BR /&gt;numSectors++;&lt;/P&gt;&lt;P&gt;/* Enter quad mode. */&lt;BR /&gt;status = flexspi_nor_enable_quad_mode(SPIFLASH_BASE);&lt;/P&gt;&lt;P&gt;// erase all necessary sectors.&lt;BR /&gt;for (i = 32; i &amp;lt; numSectors+32; i++)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp; &amp;nbsp; status = flexspi_nor_flash_erase_sector(SPIFLASH_BASE, i * SECTOR_SIZE);&lt;BR /&gt;&amp;nbsp; &amp;nbsp; if (status != kStatus_Success)&lt;BR /&gt;&amp;nbsp; &amp;nbsp; {&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; dlFlag = FALSE;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; return status; // Error erasing, abort&lt;BR /&gt;&amp;nbsp; &amp;nbsp; }&lt;BR /&gt;&amp;nbsp; &amp;nbsp; for (j = 0; j &amp;lt; PAGES_PER_SECTOR; j++)&lt;BR /&gt;&amp;nbsp; &amp;nbsp; {&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; status = flexspi_nor_flash_page_program(SPIFLASH_BASE,&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; (i * SECTOR_SIZE) + (j * FLASH_PAGE_SIZE),&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;(const uint32_t *)(srcAddr));&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;srcAddr += FLASH_PAGE_SIZE;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;if (status != kStatus_Success)&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; {&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; dlFlag = FALSE;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;return status;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; }&lt;BR /&gt;&amp;nbsp; &amp;nbsp; }&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;asm("CPSIE I"); //Unmask interrupts&lt;/P&gt;</description>
      <pubDate>Thu, 20 Mar 2025 12:29:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/MIMXRT1170-Pending-interrupts/m-p/2065559#M235330</guid>
      <dc:creator>GLantzTCore</dc:creator>
      <dc:date>2025-03-20T12:29:48Z</dc:date>
    </item>
    <item>
      <title>Re: MIMXRT1170 Pending interrupts</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/MIMXRT1170-Pending-interrupts/m-p/2066062#M235364</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/231182"&gt;@GLantzTCore&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;I did some test based on&amp;nbsp;evkbmimxrt1170_flexspi_nor_polling_transfer_cm7 with interrupts disabled in the beginning and enabled in the end, the result is still ok. Please kindly refer to the following for details.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Kan_Li_0-1742539322136.png" style="width: 477px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/329201i21C909E1C946C133/image-dimensions/477x198?v=v2" width="477" height="198" role="button" title="Kan_Li_0-1742539322136.png" alt="Kan_Li_0-1742539322136.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Kan_Li_1-1742539407067.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/329202i2D04440560DD62E9/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Kan_Li_1-1742539407067.png" alt="Kan_Li_1-1742539407067.png" /&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Kan_Li_2-1742539421469.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/329203iDC1DDA75CBC88F46/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Kan_Li_2-1742539421469.png" alt="Kan_Li_2-1742539421469.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;The board never resets here, but I am using MCUXpresso IDE instead, would you please try this IDE as well?&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Have a great day,&lt;BR /&gt;Kan&lt;/P&gt;
&lt;P&gt;&lt;BR /&gt;-------------------------------------------------------------------------------&lt;BR /&gt;Note:&lt;BR /&gt;- If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;BR /&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;BR /&gt;Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;BR /&gt;-------------------------------------------------------------------------------&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 21 Mar 2025 06:44:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/MIMXRT1170-Pending-interrupts/m-p/2066062#M235364</guid>
      <dc:creator>Kan_Li</dc:creator>
      <dc:date>2025-03-21T06:44:51Z</dc:date>
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