i.mx6 IPU clocks for CSI streaming

ivankozic — Wed, 03 Jul 2013 14:53:54 GMT

Hi all,

I have a specific question regarding IPU - After modifying some IPU driver code (a lot of things in the code are wrong - not according to the RM), I am able to successfully stream generic data from sensor to a file. However, the data is wrong, and it seems to me that this de-sync comes somewhere after MIPI-CSI2 receiver (since MIPI_ERR registers are clear - it is correctly configured).

According to the following thread Some Experience When Enable MIPI Camera, there are some clock considerations to take care of:

hsp_clk(IPU) > CCM_PIXEL_CLOCK/0.9 (CSI2IPU?) > (mipi_clk_lane frequency / (8bits*2))*data_lane_number

The MIPI stuff is clear, but CCM_PIXEL_CLOCK is only mentioned once in the entire RM and I have no clue how is it set in SW. I don't see any references to it in the CCM chapter and clock tree. So the first question is:

1. How can I set / change CCM_PIXEL_CLOCK in kernel code?

Also the part with HSP_CLK is not really clear - this should be the main high-speed IPU clock (mentioned in clock.c as IPU1_CLK). As my linux experience is a bit limited and clock.c seems really complex, I would really appreciate if someone who knows more about this topic explain me how to exactly set this clock's rate. So, official question is:

2. How do I set the HSP_CLK for IPU1 in kernel code? Is it set in clock.c or somewhere else?

Thanks in advance - all comments are welcome!

Re: i.mx6 IPU clocks for CSI streaming

JayTu — Tue, 27 Aug 2013 03:25:50 GMT

1. MIPI pixel clock came from emi_clk.

2. Yes, select different HSP or divider to get the clock you need.

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i.mx6 IPU clocks for CSI streaming

Re: i.mx6 IPU clocks for CSI streaming