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    <title>i.MX ProcessorsのトピックRe: Phy Nand Tree Support</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Phy-Nand-Tree-Support/m-p/2053954#M234600</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/171173"&gt;@AldoG&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;&lt;P&gt;I am using Config Tools for i.MX v 14 as there were compatibility issues with newer versions of config tools not being able to read our .mek.&amp;nbsp;&lt;/P&gt;&lt;P&gt;I am investigating signal ENET_NAND_TREE#. The EVK board this signal going to PTE21, but we need to use PTE21 for ENET0_RXD0. So I am trying to see if there is any GPIO compatibility issues that I need to take into consideration, but do have that signal listed in config tools. That probably means that any GPIO will do, but wanted to confirm.&lt;/P&gt;&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Screenshot 2025-02-28 121100.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/326306i516CF46E43C4FBD3/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Screenshot 2025-02-28 121100.png" alt="Screenshot 2025-02-28 121100.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;kharding&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Fri, 28 Feb 2025 19:13:36 GMT</pubDate>
    <dc:creator>kharding</dc:creator>
    <dc:date>2025-02-28T19:13:36Z</dc:date>
    <item>
      <title>Phy Nand Tree Support</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Phy-Nand-Tree-Support/m-p/2053249#M234567</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I have been using iMX Config Tools to identify GPIO compatibility, but do not see NAND_TREE# listed with the other ethernet signals. Are there any restrictions with this signal?&amp;nbsp;&lt;/P&gt;&lt;P&gt;Devices:&lt;/P&gt;&lt;P&gt;iMX8ULP&lt;/P&gt;&lt;P&gt;KSZ8081RNB&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;I appreciate your support!&lt;BR /&gt;&lt;BR /&gt;Best Regards,&lt;BR /&gt;kharding&lt;/P&gt;</description>
      <pubDate>Thu, 27 Feb 2025 19:29:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Phy-Nand-Tree-Support/m-p/2053249#M234567</guid>
      <dc:creator>kharding</dc:creator>
      <dc:date>2025-02-27T19:29:41Z</dc:date>
    </item>
    <item>
      <title>Re: Phy Nand Tree Support</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Phy-Nand-Tree-Support/m-p/2053349#M234571</link>
      <description>&lt;P&gt;Hello,&lt;BR /&gt;&lt;BR /&gt;I can see the FlexSPI0, FlexSPI1, FlexSPI2 &amp;amp; ENET0 pins available in Config Tool ver 24.12&lt;BR /&gt;&lt;BR /&gt;Could you share which version you are using?&lt;BR /&gt;Also, could you be a bit more specific of what are you trying to find?&lt;BR /&gt;&lt;BR /&gt;Best regards/Saludos,&lt;BR /&gt;Aldo.&lt;/P&gt;</description>
      <pubDate>Fri, 28 Feb 2025 00:44:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Phy-Nand-Tree-Support/m-p/2053349#M234571</guid>
      <dc:creator>AldoG</dc:creator>
      <dc:date>2025-02-28T00:44:23Z</dc:date>
    </item>
    <item>
      <title>Re: Phy Nand Tree Support</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Phy-Nand-Tree-Support/m-p/2053954#M234600</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/171173"&gt;@AldoG&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;&lt;P&gt;I am using Config Tools for i.MX v 14 as there were compatibility issues with newer versions of config tools not being able to read our .mek.&amp;nbsp;&lt;/P&gt;&lt;P&gt;I am investigating signal ENET_NAND_TREE#. The EVK board this signal going to PTE21, but we need to use PTE21 for ENET0_RXD0. So I am trying to see if there is any GPIO compatibility issues that I need to take into consideration, but do have that signal listed in config tools. That probably means that any GPIO will do, but wanted to confirm.&lt;/P&gt;&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Screenshot 2025-02-28 121100.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/326306i516CF46E43C4FBD3/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Screenshot 2025-02-28 121100.png" alt="Screenshot 2025-02-28 121100.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;kharding&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 28 Feb 2025 19:13:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Phy-Nand-Tree-Support/m-p/2053954#M234600</guid>
      <dc:creator>kharding</dc:creator>
      <dc:date>2025-02-28T19:13:36Z</dc:date>
    </item>
    <item>
      <title>Re: Phy Nand Tree Support</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Phy-Nand-Tree-Support/m-p/2054929#M234670</link>
      <description>&lt;P&gt;Hello,&lt;BR /&gt;&lt;BR /&gt;Got it, I do see even on the image you have shared that&amp;nbsp;&lt;SPAN&gt;ENET0_RXD0 is indeed there, from up to bottom is the number 13.&lt;BR /&gt;&lt;BR /&gt;The 2 available pins are PTE21 (Which is the one on the EVK) and PTF1.&lt;BR /&gt;&lt;BR /&gt;Best regards/Saludos,&lt;BR /&gt;Aldo.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 03 Mar 2025 19:25:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Phy-Nand-Tree-Support/m-p/2054929#M234670</guid>
      <dc:creator>AldoG</dc:creator>
      <dc:date>2025-03-03T19:25:52Z</dc:date>
    </item>
    <item>
      <title>Re: Phy Nand Tree Support</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Phy-Nand-Tree-Support/m-p/2058024#M234821</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/171173"&gt;@AldoG&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I am looking for&amp;nbsp;&lt;SPAN&gt;ENET_NAND_TREE#.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Best Regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;kharding&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Fri, 07 Mar 2025 16:33:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Phy-Nand-Tree-Support/m-p/2058024#M234821</guid>
      <dc:creator>kharding</dc:creator>
      <dc:date>2025-03-07T16:33:18Z</dc:date>
    </item>
    <item>
      <title>Re: Phy Nand Tree Support</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Phy-Nand-Tree-Support/m-p/2058078#M234823</link>
      <description>&lt;P&gt;Hello,&lt;BR /&gt;&lt;BR /&gt;This may be due to the old version of the tool is using an old configuration for the processor, since as you can see there is no FlexSPI signals routed to PTE21, and it is safe to use it as ENET0_RXD.&lt;BR /&gt;&lt;BR /&gt;Also, an small mistake from my side as I notice that i.MX8ULP EVK we use PTF1 for ENET0_RXD, but as said above there is no dedicated or FlexSPIx signals that can be routed to PTE21.&lt;BR /&gt;&lt;BR /&gt;Best regards/Saludos,&lt;BR /&gt;Aldo.&lt;/P&gt;</description>
      <pubDate>Fri, 07 Mar 2025 18:57:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Phy-Nand-Tree-Support/m-p/2058078#M234823</guid>
      <dc:creator>AldoG</dc:creator>
      <dc:date>2025-03-07T18:57:29Z</dc:date>
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