IMX8MP - Delay between two consecutive SPI write

Bhavin-Sharma — Thu, 27 Feb 2025 20:09:30 GMT

Hi there,

I am interfacing a DAC module through SPI (ECSPI-1) with MPU. The clock is setup at 30MHz and what I have observed between two immediate consecutive calls (without any delay) of spi_write (implemented within kernel device driver for DAC) I am observing a delay of 4us between the clocks of these two transfers. The data that I am writing is 24 bits long and according to my application I need to write this data continuously and more frequently for which I need to bring this delay down to some ~800-900ns.

Below are my queries :
1. If I am not implementing any API calls or specifically adding any delays what is the reason for this idle time of 4us?

2. How can I overcome this delay and meet my requirement?

Any help or suggestions would be greatly appreciated.

Best regards,

Bhavin

topic IMX8MP - Delay between two consecutive SPI write in i.MX Processors

IMX8MP - Delay between two consecutive SPI write