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    <title>i.MX ProcessorsのトピックRe: VPU interconnection on imx8mp</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/VPU-interconnection-on-imx8mp/m-p/2043524#M233975</link>
    <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;Is better try this appnote:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.nxp.com/docs/en/user-guide/iMX8MP_CAMERA_DISPLAY_GUIDE.pdf" target="_blank"&gt;https://www.nxp.com/docs/en/user-guide/iMX8MP_CAMERA_DISPLAY_GUIDE.pdf&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Also this information from a third party:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://developer.ridgerun.com/wiki/index.php/ISP_Architecture_i.MX8M_Plus_:_V4L2_Sensor_Drivers_Porting_Guide" target="_blank"&gt;https://developer.ridgerun.com/wiki/index.php/ISP_Architecture_i.MX8M_Plus_:_V4L2_Sensor_Drivers_Porting_Guide&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Thu, 13 Feb 2025 15:22:45 GMT</pubDate>
    <dc:creator>Bio_TICFSL</dc:creator>
    <dc:date>2025-02-13T15:22:45Z</dc:date>
    <item>
      <title>VPU interconnection on imx8mp</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/VPU-interconnection-on-imx8mp/m-p/2043325#M233964</link>
      <description>&lt;P&gt;Dear community!&lt;/P&gt;&lt;P&gt;I would like to ask you a question whether is possible to connect the endpoints of the ISP or Dewarp Engine directly to the VPU so that frames are automatically forwarded. I found something like "interconnects" on &lt;A href="https://www.kernel.org/doc/Documentation/devicetree/bindings/soc/imx/fsl%2Cimx8mp-media-blk-ctrl.yaml" target="_blank"&gt;https://www.kernel.org/doc/Documentation/devicetree/bindings/soc/imx/fsl%2Cimx8mp-media-blk-ctrl.yaml&lt;/A&gt; but didn't find more info. Other location is &lt;A href="https://www.kernel.org/doc/Documentation/devicetree/bindings/soc/imx/fsl%2Cimx8mm-vpu-blk-ctrl.yaml" target="_blank"&gt;https://www.kernel.org/doc/Documentation/devicetree/bindings/soc/imx/fsl%2Cimx8mm-vpu-blk-ctrl.yaml&lt;/A&gt; while it's for imx8mm, but anyway without any success.&lt;/P&gt;&lt;P&gt;So is it possible to do it? If yes, how?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thank you,&lt;BR /&gt;Andy&lt;/P&gt;</description>
      <pubDate>Thu, 13 Feb 2025 09:54:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/VPU-interconnection-on-imx8mp/m-p/2043325#M233964</guid>
      <dc:creator>andrej_valek</dc:creator>
      <dc:date>2025-02-13T09:54:50Z</dc:date>
    </item>
    <item>
      <title>Re: VPU interconnection on imx8mp</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/VPU-interconnection-on-imx8mp/m-p/2043524#M233975</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;Is better try this appnote:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.nxp.com/docs/en/user-guide/iMX8MP_CAMERA_DISPLAY_GUIDE.pdf" target="_blank"&gt;https://www.nxp.com/docs/en/user-guide/iMX8MP_CAMERA_DISPLAY_GUIDE.pdf&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Also this information from a third party:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://developer.ridgerun.com/wiki/index.php/ISP_Architecture_i.MX8M_Plus_:_V4L2_Sensor_Drivers_Porting_Guide" target="_blank"&gt;https://developer.ridgerun.com/wiki/index.php/ISP_Architecture_i.MX8M_Plus_:_V4L2_Sensor_Drivers_Porting_Guide&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 13 Feb 2025 15:22:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/VPU-interconnection-on-imx8mp/m-p/2043524#M233975</guid>
      <dc:creator>Bio_TICFSL</dc:creator>
      <dc:date>2025-02-13T15:22:45Z</dc:date>
    </item>
    <item>
      <title>Re: VPU interconnection on imx8mp</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/VPU-interconnection-on-imx8mp/m-p/2044486#M234015</link>
      <description>&lt;P&gt;Hello,&lt;BR /&gt;&lt;BR /&gt;Does it mean that it's impossible, or ?&lt;/P&gt;&lt;P&gt;Just for a background, the current visualized pipeline looks like this:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;# Start ISP Mediaserver in the background
/opt/imx8-isp/bin/start_isp.sh &amp;amp;

# Start GStreamer pipeline for image transmission via network
gst-launch-1.0 v4l2src device=/dev/video3 \
  ! video/x-raw,format=YUY2,width=1920,height=1080 \
  ! vpuenc_hevc \
  ! rtph265pay \
  ! udpsink host=192.168.1.2 port=1234&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;The final application will not utilize GStreamer. Therefore, it is necessary to find an alternative method for passing frames to the VPU. Ideally, the endpoint of the Dewarp Engine can be directly connected to the VPU sink in the device tree.&lt;/P&gt;&lt;P&gt;So how to achieve something like that?&lt;/P&gt;&lt;P&gt;Andy&lt;/P&gt;</description>
      <pubDate>Fri, 14 Feb 2025 10:24:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/VPU-interconnection-on-imx8mp/m-p/2044486#M234015</guid>
      <dc:creator>andrej_valek</dc:creator>
      <dc:date>2025-02-14T10:24:09Z</dc:date>
    </item>
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