<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>i.MX Processors中的主题 Re: imx8mp lvds</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/imx8mp-lvds/m-p/2042140#M233894</link>
    <description>&lt;P&gt;thank you!&amp;nbsp;&lt;/P&gt;&lt;P&gt;can it&amp;nbsp;support&amp;nbsp;2 x LVDS Single Channel？&lt;SPAN&gt;we need to connect two display panel.&lt;/SPAN&gt;&lt;/P&gt;</description>
    <pubDate>Wed, 12 Feb 2025 02:19:23 GMT</pubDate>
    <dc:creator>f1engmin11</dc:creator>
    <dc:date>2025-02-12T02:19:23Z</dc:date>
    <item>
      <title>imx8mp lvds</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8mp-lvds/m-p/2041721#M233868</link>
      <description>&lt;P&gt;&lt;A href="https://www.nxp.com.cn/design/design-center/development-boards-and-designs/8MPLUSLPD4-EVK" target="_blank"&gt;i.MX 8M Plus评估套件 | NXP 半导体&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="f1engmin11_0-1739271731610.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/323403iA2CE0B070E955929/image-size/medium?v=v2&amp;amp;px=400" role="button" title="f1engmin11_0-1739271731610.png" alt="f1engmin11_0-1739271731610.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;May I ask if the LVDS0 and LVDS1 interfaces of imx8mp can work on two screens simultaneously?&lt;/P&gt;&lt;P&gt;Do you have any examples？&lt;/P&gt;</description>
      <pubDate>Tue, 11 Feb 2025 11:09:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8mp-lvds/m-p/2041721#M233868</guid>
      <dc:creator>f1engmin11</dc:creator>
      <dc:date>2025-02-11T11:09:18Z</dc:date>
    </item>
    <item>
      <title>Re: imx8mp lvds</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8mp-lvds/m-p/2041840#M233877</link>
      <description>&lt;P&gt;HI &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/219392"&gt;@f1engmin11&lt;/a&gt;!&lt;BR /&gt;Thank you for contacting NXP Support!&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;imx8mp only can support one display with dual channel&lt;/P&gt;</description>
      <pubDate>Tue, 11 Feb 2025 14:11:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8mp-lvds/m-p/2041840#M233877</guid>
      <dc:creator>Chavira</dc:creator>
      <dc:date>2025-02-11T14:11:19Z</dc:date>
    </item>
    <item>
      <title>Re: imx8mp lvds</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8mp-lvds/m-p/2042140#M233894</link>
      <description>&lt;P&gt;thank you!&amp;nbsp;&lt;/P&gt;&lt;P&gt;can it&amp;nbsp;support&amp;nbsp;2 x LVDS Single Channel？&lt;SPAN&gt;we need to connect two display panel.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 12 Feb 2025 02:19:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8mp-lvds/m-p/2042140#M233894</guid>
      <dc:creator>f1engmin11</dc:creator>
      <dc:date>2025-02-12T02:19:23Z</dc:date>
    </item>
  </channel>
</rss>

