8MPLUSLPD4-EVK, corrupted TX frames on ENET_QOS

mdanilau — Mon, 27 Jan 2025 09:47:13 GMT

Hi,

I'm facing strange issue with my evaluation board, perhaps somebody can help me in this matter.

I'm trying to write a small BareMetall application for ENET_QOS to send and receive Ethernet frames. I already adapted an existing application that works perfect on other dwmac's (ENET_QOS is actually a dwmac, am i right?) and i can even transmit and receive Ethernet frames, but the outgoing frames are somehow corrupted. I.e. if a TX frame (a simple EtherCAT frame) looks like:

[000] 01 01 05 01 00 00 00 AD BE EF BA 00 88 A4 0E 10
[010] 01 80 00 00 30 01 04 00 00 00 00 00 00 00 00 00
[020] 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
[030] 00 00 00 00 00 00 00 00 00 00 00 00

on the wire it looks like:

[000] 1D 11 51 11 00 00 00 F9 FA FB BE 0B 88 E8 EA 10
[010] 11 00 08 00 30 13 40 00 00 00 00 00 00 00 00 00
[020] 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
[030] 00 00 00 00 00 00 00 00 00 00 00 00

Whereas if i ping over ENET_QOS from u-boot everything works fine and the ping frames are right. Moreover, in my code RX frames are not corrupted as well, only TX frames are broken. I see no pattern in the way the frames will be corrupted.

I suppose something is wrong with RGMII clocking or data synchronization, but i don't get what exactly.

I've tried pretty much everything and ended up with bit-wise registers comparison between u-boot and my application. I programmed clocking and gating exactly as u-boot does it, the ENET_QOS initialization and TX/RX data paths are mainly the same (beside some minor differences), but the TX frames are still corrupted.

I'm pretty sure i've missed something crucial in MAC/PHY initialization, but i cannot figure out what. What can cause such frame corruption? Is there is something else that i should check?

Regards,

Re: 8MPLUSLPD4-EVK, corrupted TX frames on ENET_QOS

JosephAtNXP — Wed, 29 Jan 2025 18:05:56 GMT

Hi,

Thank you for your interest in NXP Semiconductor products,

ENET-QOS is indeed a DWMAC but all DWMACs are implemented in SoCs with increased/reduced functions that you would need to consult with the reference manual.

If you are using Cortex-A, you have to take in mind several module initializations and handlings under BareMetal as is done in our Linux BSP or for EtherCAT RT Edge BSP, this process is under your own risk since we do not have documentation or support for BareMetal in Cortex-A.

If you are developing this design in Cortex-A using BareMetal, I strongly suggest you contact Pro-Support services.

Regards

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8MPLUSLPD4-EVK, corrupted TX frames on ENET_QOS

Re: 8MPLUSLPD4-EVK, corrupted TX frames on ENET_QOS