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    <title>topic Re: RT1180 EVK debugging when application is on SDRAM. in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/RT1180-EVK-debugging-when-application-is-on-SDRAM/m-p/2033277#M233305</link>
    <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;ok the problem on SDRAM is the rework needed to use it on EVK board. i can't do that so i'm testing HyperRam and the result is to have the code that in first step run but after a few cycle crash. i'm closing this threat and open one new.&lt;/P&gt;&lt;P&gt;thanks&lt;/P&gt;</description>
    <pubDate>Thu, 23 Jan 2025 15:29:42 GMT</pubDate>
    <dc:creator>SimoneColomboWEG</dc:creator>
    <dc:date>2025-01-23T15:29:42Z</dc:date>
    <item>
      <title>RT1180 EVK debugging when application is on SDRAM.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/RT1180-EVK-debugging-when-application-is-on-SDRAM/m-p/2032205#M233228</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;i'm in a mcu choosing phase on my project so i need to understand is nxp is good or not, i'm developing an application using imx RT1180 with EVK board and MCUXpresso 24.x as SDK.&lt;/P&gt;&lt;P&gt;I need to use external SDRAM and not DTC because my evaluation code is too large, i've find a lot of other posts&amp;nbsp; that indicate a RT1050 script&amp;nbsp; for debugger, one for 1170 but nothing for 1180. All examples uses internal DTC and only one has initialization for external SDRAM used to store data ma nothing to execute it. So i presume i need xip file and script for debugger and someting else. I'd like to use some of official instead something done by me to correctly evaluated the platform.&lt;/P&gt;&lt;P&gt;And again i'd like to know if also exist a way to directly program external flash to store my program via jtag instead using a provisioning tool all times and not work on ram al loose everything on reboot.&lt;/P&gt;&lt;P&gt;I hope on your help to have a officilal script and xip file and also a small guide to configure it. thanks.&lt;/P&gt;&lt;P&gt;My evk version if needed is:&lt;/P&gt;&lt;P&gt;SCH-50577 REV C3&lt;/P&gt;&lt;P&gt;700-50577 REV C1&lt;/P&gt;&lt;P&gt;This is the link i've found:&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/RT1170-debugging-when-application-is-built-for-SDRAM/m-p/1373296" target="_blank"&gt;https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/RT1170-debugging-when-application-is-built-for-SDRAM/m-p/1373296&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/MCUXpresso-and-RT1050-download-and-debug-in-SDRAM/m-p/896979" target="_blank"&gt;https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/MCUXpresso-and-RT1050-download-and-debug-in-SDRAM/m-p/896979&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/t5/NXP-Tech-Blog/Overview-of-using-the-MIMXRT1050-EVK-B-with-MCUXpresso-IDE/ba-p/1131013" target="_blank"&gt;https://community.nxp.com/t5/NXP-Tech-Blog/Overview-of-using-the-MIMXRT1050-EVK-B-with-MCUXpresso-IDE/ba-p/1131013&lt;/A&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 22 Jan 2025 09:17:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/RT1180-EVK-debugging-when-application-is-on-SDRAM/m-p/2032205#M233228</guid>
      <dc:creator>SimoneColomboWEG</dc:creator>
      <dc:date>2025-01-22T09:17:17Z</dc:date>
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    <item>
      <title>Re: RT1180 EVK debugging when application is on SDRAM.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/RT1180-EVK-debugging-when-application-is-on-SDRAM/m-p/2032225#M233229</link>
      <description>&lt;P&gt;Hello!&lt;/P&gt;&lt;P&gt;NXP is a reliable choice for MCUs. To use external SDRAM with the i.MX RT1180, configure your project in MCUXpresso to use SDRAM instead of DTC. Use the MCUBootUtility tool to program the external flash via JTAG. Ensure all steps, including setting the device configuration data, are correctly followed.&lt;/P&gt;&lt;P&gt;I hope this helps!&lt;/P&gt;</description>
      <pubDate>Wed, 22 Jan 2025 09:40:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/RT1180-EVK-debugging-when-application-is-on-SDRAM/m-p/2032225#M233229</guid>
      <dc:creator>Erika383Rivera</dc:creator>
      <dc:date>2025-01-22T09:40:55Z</dc:date>
    </item>
    <item>
      <title>Re: RT1180 EVK debugging when application is on SDRAM.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/RT1180-EVK-debugging-when-application-is-on-SDRAM/m-p/2032321#M233233</link>
      <description>&lt;P&gt;Thanke to replied fast,&lt;/P&gt;&lt;P&gt;first step using SDRAM:&lt;/P&gt;&lt;P&gt;i'm configuing my project like this&lt;/P&gt;&lt;P&gt;project-&amp;gt; proprierties-&amp;gt;MCU Settings moved from ram6 a ram la SDRAM&lt;/P&gt;&lt;P&gt;project-&amp;gt; proprierties-&amp;gt;Settings-&amp;gt; Managed Link Script-&amp;gt;.bbs in SDRAM e add flag on Link application&lt;/P&gt;&lt;P&gt;and then in debug config-&amp;gt; linkserver debug-&amp;gt; advanced setting checked if is present --cachelib libm7_cache.so&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;complied ok, SDRAM is populated but when starts writing this is the result:&lt;/P&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;P&gt;LinkServer RedlinkMulti Driver v24.12 (Dec 18 2024 18:34:07 - crt_emu_cm_redlink build 869)&lt;/P&gt;&lt;P&gt;Found chip XML file in C:/Project/ADV500/ADV500_cm7/Debug\MIMXRT1189xxxxx.xml&lt;/P&gt;&lt;P&gt;Reconnected to existing LinkServer process.&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;============= SCRIPT: RT1180_connect_M33_wake_M7_ITC.scp =============&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;RT1180 Connect M33 and Wake M7 to ITC Script&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;DpID = 5BA02477&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;APID = 0x74770001&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;************ runBootLoader to enter serial downloader mode *************&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;PC = 1001BC6A, SP = 30489F40&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;DpID = 5BA02477&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;APID = 0x74770001&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;R15 = 0x100157F4&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;********** Initialize CM33 ************&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Filling 0xE000E180 + 0x00000040 with 0xFFFFFFFF&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Filling 0xE000E280 + 0x00000040 with 0xFFFFFFFF&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Filling 0x201E0000 + 0x00020000 with 0x00000000&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Filling 0x20200008 + 0x0001FFF8 with 0x00000000&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;************* Enable CM7 **************&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;************ Prepare Clock *************&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;******** Creating Landing Zone *********&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Filling 0x303C0000 + 0x00020000 with 0x00000000&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Filling 0x303E0000 + 0x00020000 with 0x00000000&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Filling 0x30400000 + 0x00020000 with 0x00000000&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Filling 0x30420000 + 0x00020000 with 0x00000000&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;************* Kickoff CM7 **************&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Resp1 : 0xE1D20206&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Resp2 : 0x000000D6&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;TAP 0: 5BA02477 AP 0: APID: 74770001 ROM Table: 00000002&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;TAP 0: 5BA02477 AP 1: APID: 44770002 ROM Table: 80000003&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;TAP 0: 5BA02477 Core 2: M7 APID: 74770001 ROM Table: E00FD003*&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;TAP 0: 5BA02477 Core 3: M33 APID: 74770001 ROM Table: E00FF003&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;APID = 0x74770001&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;============= END SCRIPT =============================================&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Probe Firmware: MCU-LINK on-board (r1E2) CMSIS-DAP V3.146 (NXP Semiconductors)&lt;/P&gt;&lt;P&gt;Serial Number: OK1PG5OV03J1X&lt;/P&gt;&lt;P&gt;VID:PID: 1FC9:0143&lt;/P&gt;&lt;P&gt;USB Path: 0001:001c:00&lt;/P&gt;&lt;P&gt;Using memory from core 2 after searching for a good core&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;( 30) Emulator Connected&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;debug interface type = CoreSight DP (DAP DP ID 5BA02477) over SWD TAP 0&lt;/P&gt;&lt;P&gt;processor type = Cortex-M7 (CPU ID 00000C27) on DAP AP 2&lt;/P&gt;&lt;P&gt;number of h/w breakpoints = 8&lt;/P&gt;&lt;P&gt;number of flash patches = 0&lt;/P&gt;&lt;P&gt;number of h/w watchpoints = 4&lt;/P&gt;&lt;P&gt;Probe(0): Connected&amp;amp;Reset. DpID: 5BA02477. CpuID: 00000C27. Info: &amp;lt;None&amp;gt;&lt;/P&gt;&lt;P&gt;Debug protocol: SWD. RTCK: Disabled. Vector catch: Disabled.&lt;/P&gt;&lt;P&gt;Content of CoreSight Debug ROM(s):&lt;/P&gt;&lt;P&gt;RBASE E00FD000: CID B105100D PID 000008E88C ROM (type 0x1)&lt;/P&gt;&lt;P&gt;ROM 1 E00FE000: CID B105100D PID 04000BB4C8 ROM (type 0x1)&lt;/P&gt;&lt;P&gt;ROM 2 E00FF000: CID B105100D PID 04000BB4C7 ROM (type 0x1)&lt;/P&gt;&lt;P&gt;ROM 3 E000E000: CID B105E00D PID 04000BB00C Gen SCS (type 0x0)&lt;/P&gt;&lt;P&gt;ROM 3 E0001000: CID B105E00D PID 04000BB002 Gen DWT (type 0x0)&lt;/P&gt;&lt;P&gt;ROM 3 E0002000: CID B105E00D PID 04000BB00E Gen (type 0x0)&lt;/P&gt;&lt;P&gt;ROM 3 E0000000: CID B105E00D PID 04000BB001 Gen ITM (type 0x0)&lt;/P&gt;&lt;P&gt;ROM 2 E0041000: CID B105900D PID 04001BB975 CSt ARM ETMv4.0 type 0x13 Trace Source - Core&lt;/P&gt;&lt;P&gt;ROM 2 E0042000: CID B105900D PID 04004BB906 CSt type 0x14 Debug Control - Trigger, e.g. ECT&lt;/P&gt;&lt;P&gt;ROM 1 E0043000: CID B105900D PID 04001BB908 CSt CSTF type 0x12 Trace Link - Trace funnel/router&lt;/P&gt;&lt;P&gt;CM7 Rev. 7.0 DTCM: 512KB ITCM: 512KB&lt;/P&gt;&lt;P&gt;LoUU: Level 2: LoC: Level 2&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Level 1 Cache Type: Instruction+Data&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;ICache 32K: WT: Y WB: Y RA: Y WA: Y NumSets: 512 Assoc: 2 LineSize: 8&lt;/P&gt;&lt;P&gt;DCache 32K: WT: Y WB: Y RA: Y WA: Y NumSets: 256 Assoc: 4 LineSize: 8&lt;/P&gt;&lt;P&gt;NXP: MIMXRT1189xxxxx&lt;/P&gt;&lt;P&gt;Connected: was_reset=false. was_stopped=true&lt;/P&gt;&lt;P&gt;Awaiting telnet connection to port 3330 ...&lt;/P&gt;&lt;P&gt;GDB nonstop mode enabled&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;FreeRTOS stack backtrace is disabled in Non-stop mode (use All-stop)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;After error Nn(05). Wire ACK Wait in DAP access -&lt;/P&gt;&lt;P&gt;Failed to read address register in DAP - Nn(05). Wire ACK Wait in DAP access&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Target error from Write Memory: Em(17). Debug port inaccessible after access at location 0x80000000&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;GDB stub (C:\nxp\LinkServer_24.12.21\binaries\crt_emu_cm_redlink) terminating - GDB protocol problem: Pipe has been closed by GDB.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;error closing down debug session - Nn(05). Wire ACK Fault in DAP access&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;i've attached my project.&lt;/P&gt;&lt;P&gt;thanks&lt;/P&gt;&lt;P&gt;Simone&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/DIV&gt;&lt;/DIV&gt;</description>
      <pubDate>Wed, 22 Jan 2025 11:39:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/RT1180-EVK-debugging-when-application-is-on-SDRAM/m-p/2032321#M233233</guid>
      <dc:creator>SimoneColomboWEG</dc:creator>
      <dc:date>2025-01-22T11:39:53Z</dc:date>
    </item>
    <item>
      <title>Re: RT1180 EVK debugging when application is on SDRAM.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/RT1180-EVK-debugging-when-application-is-on-SDRAM/m-p/2033277#M233305</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;ok the problem on SDRAM is the rework needed to use it on EVK board. i can't do that so i'm testing HyperRam and the result is to have the code that in first step run but after a few cycle crash. i'm closing this threat and open one new.&lt;/P&gt;&lt;P&gt;thanks&lt;/P&gt;</description>
      <pubDate>Thu, 23 Jan 2025 15:29:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/RT1180-EVK-debugging-when-application-is-on-SDRAM/m-p/2033277#M233305</guid>
      <dc:creator>SimoneColomboWEG</dc:creator>
      <dc:date>2025-01-23T15:29:42Z</dc:date>
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