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    <title>i.MX ProcessorsのトピックRe: i.MX8M PLUS CPLD Design?</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8M-PLUS-CPLD-Design/m-p/2029441#M233070</link>
    <description>&lt;P&gt;May you could use FlexSPI which could support FPGA/CPLD devices.&lt;/P&gt;
&lt;P&gt;You could refer to&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;A href="https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/Expend-i-MX8M-93-Capability-to-Connect-FPGA-CPLD-by-FlexSPI/ta-p/1691355" target="_blank"&gt;&lt;SPAN&gt;https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/Expend-i-MX8M-93-Capability-to-Connect-FPGA-CPLD-by-FlexSPI/ta-p/1691355&lt;/SPAN&gt;&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Thanks&lt;/P&gt;</description>
    <pubDate>Fri, 17 Jan 2025 03:14:45 GMT</pubDate>
    <dc:creator>June_Lu</dc:creator>
    <dc:date>2025-01-17T03:14:45Z</dc:date>
    <item>
      <title>i.MX8M PLUS CPLD Design?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8M-PLUS-CPLD-Design/m-p/2027092#M232952</link>
      <description>&lt;P&gt;Hi, I have a question while reviewing the use of I.MX8M PLUS. I want to connect XC9572XL to I.MX8M PLUS (address &amp;amp; data).&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;In case of using I.MX6 SOLO, CPLD is controlled by connecting to External Interface Module (EIM).&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;In case of I.MX8M PLUS, EIM Interface group is not visible.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Could you please explain in detail how to design an 8-bit address decoder?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 14 Jan 2025 00:37:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8M-PLUS-CPLD-Design/m-p/2027092#M232952</guid>
      <dc:creator>armmey</dc:creator>
      <dc:date>2025-01-14T00:37:34Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8M PLUS CPLD Design?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8M-PLUS-CPLD-Design/m-p/2029441#M233070</link>
      <description>&lt;P&gt;May you could use FlexSPI which could support FPGA/CPLD devices.&lt;/P&gt;
&lt;P&gt;You could refer to&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;A href="https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/Expend-i-MX8M-93-Capability-to-Connect-FPGA-CPLD-by-FlexSPI/ta-p/1691355" target="_blank"&gt;&lt;SPAN&gt;https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/Expend-i-MX8M-93-Capability-to-Connect-FPGA-CPLD-by-FlexSPI/ta-p/1691355&lt;/SPAN&gt;&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Thanks&lt;/P&gt;</description>
      <pubDate>Fri, 17 Jan 2025 03:14:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8M-PLUS-CPLD-Design/m-p/2029441#M233070</guid>
      <dc:creator>June_Lu</dc:creator>
      <dc:date>2025-01-17T03:14:45Z</dc:date>
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