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    <title>topic Why doesn't uart2 node include dmas in imx8mm.dtsi? in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Why-doesn-t-uart2-node-include-dmas-in-imx8mm-dtsi/m-p/2022543#M232665</link>
    <description>&lt;P&gt;Hi.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;In imx8mm.dtsi, uart2 node don't include the dmas.&lt;/P&gt;&lt;P&gt;But other uart node (1. 2 and 4) include the dmas.&lt;/P&gt;&lt;P&gt;Why? and What is the impact of not including the dmas?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;■ imx8mm.dtsi&lt;/P&gt;&lt;P&gt;&lt;A href="https://github.com/torvalds/linux/blob/master/arch/arm64/boot/dts/freescale/imx8mm.dtsi" target="_blank"&gt;https://github.com/torvalds/linux/blob/master/arch/arm64/boot/dts/freescale/imx8mm.dtsi&lt;/A&gt;&lt;/P&gt;&lt;DIV&gt;&lt;SPAN&gt;uart1: serial@30860000 {&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart";&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;reg = &amp;lt;0x30860000 0x10000&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;interrupts = &amp;lt;GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;clocks = &amp;lt;&amp;amp;clk IMX8MM_CLK_UART1_ROOT&amp;gt;,&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;lt;&amp;amp;clk IMX8MM_CLK_UART1_ROOT&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;clock-names = "ipg", "per";&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;dmas = &amp;lt;&amp;amp;sdma1 22 4 0&amp;gt;, &amp;lt;&amp;amp;sdma1 23 4 0&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;dma-names = "rx", "tx";&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;status = "disabled";&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;};&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;uart3: serial@30880000 {&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart";&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;reg = &amp;lt;0x30880000 0x10000&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;interrupts = &amp;lt;GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;clocks = &amp;lt;&amp;amp;clk IMX8MM_CLK_UART3_ROOT&amp;gt;,&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;lt;&amp;amp;clk IMX8MM_CLK_UART3_ROOT&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;clock-names = "ipg", "per";&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;dmas = &amp;lt;&amp;amp;sdma1 26 4 0&amp;gt;, &amp;lt;&amp;amp;sdma1 27 4 0&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;dma-names = "rx", "tx";&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;status = "disabled";&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;};&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;uart2: serial@30890000 {&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart";&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;reg = &amp;lt;0x30890000 0x10000&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;interrupts = &amp;lt;GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;clocks = &amp;lt;&amp;amp;clk IMX8MM_CLK_UART2_ROOT&amp;gt;,&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;lt;&amp;amp;clk IMX8MM_CLK_UART2_ROOT&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;clock-names = "ipg", "per";&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;status = "disabled";&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;};&lt;/SPAN&gt;&lt;/DIV&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Best Regards.&lt;/P&gt;</description>
    <pubDate>Mon, 06 Jan 2025 10:51:51 GMT</pubDate>
    <dc:creator>takeshi100</dc:creator>
    <dc:date>2025-01-06T10:51:51Z</dc:date>
    <item>
      <title>Why doesn't uart2 node include dmas in imx8mm.dtsi?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Why-doesn-t-uart2-node-include-dmas-in-imx8mm-dtsi/m-p/2022543#M232665</link>
      <description>&lt;P&gt;Hi.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;In imx8mm.dtsi, uart2 node don't include the dmas.&lt;/P&gt;&lt;P&gt;But other uart node (1. 2 and 4) include the dmas.&lt;/P&gt;&lt;P&gt;Why? and What is the impact of not including the dmas?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;■ imx8mm.dtsi&lt;/P&gt;&lt;P&gt;&lt;A href="https://github.com/torvalds/linux/blob/master/arch/arm64/boot/dts/freescale/imx8mm.dtsi" target="_blank"&gt;https://github.com/torvalds/linux/blob/master/arch/arm64/boot/dts/freescale/imx8mm.dtsi&lt;/A&gt;&lt;/P&gt;&lt;DIV&gt;&lt;SPAN&gt;uart1: serial@30860000 {&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart";&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;reg = &amp;lt;0x30860000 0x10000&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;interrupts = &amp;lt;GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;clocks = &amp;lt;&amp;amp;clk IMX8MM_CLK_UART1_ROOT&amp;gt;,&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;lt;&amp;amp;clk IMX8MM_CLK_UART1_ROOT&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;clock-names = "ipg", "per";&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;dmas = &amp;lt;&amp;amp;sdma1 22 4 0&amp;gt;, &amp;lt;&amp;amp;sdma1 23 4 0&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;dma-names = "rx", "tx";&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;status = "disabled";&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;};&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;uart3: serial@30880000 {&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart";&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;reg = &amp;lt;0x30880000 0x10000&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;interrupts = &amp;lt;GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;clocks = &amp;lt;&amp;amp;clk IMX8MM_CLK_UART3_ROOT&amp;gt;,&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;lt;&amp;amp;clk IMX8MM_CLK_UART3_ROOT&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;clock-names = "ipg", "per";&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;dmas = &amp;lt;&amp;amp;sdma1 26 4 0&amp;gt;, &amp;lt;&amp;amp;sdma1 27 4 0&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;dma-names = "rx", "tx";&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;status = "disabled";&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;};&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;uart2: serial@30890000 {&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart";&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;reg = &amp;lt;0x30890000 0x10000&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;interrupts = &amp;lt;GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;clocks = &amp;lt;&amp;amp;clk IMX8MM_CLK_UART2_ROOT&amp;gt;,&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;lt;&amp;amp;clk IMX8MM_CLK_UART2_ROOT&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;clock-names = "ipg", "per";&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;status = "disabled";&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;};&lt;/SPAN&gt;&lt;/DIV&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Best Regards.&lt;/P&gt;</description>
      <pubDate>Mon, 06 Jan 2025 10:51:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Why-doesn-t-uart2-node-include-dmas-in-imx8mm-dtsi/m-p/2022543#M232665</guid>
      <dc:creator>takeshi100</dc:creator>
      <dc:date>2025-01-06T10:51:51Z</dc:date>
    </item>
    <item>
      <title>Re: Why doesn't uart2 node include dmas in imx8mm.dtsi?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Why-doesn-t-uart2-node-include-dmas-in-imx8mm-dtsi/m-p/2022856#M232684</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;This is because UART2 is used for debug purposes. If you check the device tree, the debug UART port doesn't use DMA.&lt;/P&gt;
&lt;P&gt;Best regards.&lt;/P&gt;</description>
      <pubDate>Tue, 07 Jan 2025 01:43:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Why-doesn-t-uart2-node-include-dmas-in-imx8mm-dtsi/m-p/2022856#M232684</guid>
      <dc:creator>JorgeCas</dc:creator>
      <dc:date>2025-01-07T01:43:46Z</dc:date>
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