topic Re: IMX8ULP Mode Registers LPDDR4 in i.MX Processors

IMX8ULP Mode Registers LPDDR4

fisimalpro — Thu, 26 Dec 2024 08:59:24 GMT

Hi, I am trying to read the Mode Registers of the LPDDR4 RAM on the i.MX8ULP, but the reference manual is not clear on how to do it. Could you help me? Thanks!

Re: IMX8ULP Mode Registers LPDDR4

Rita_Wang — Thu, 26 Dec 2024 09:18:13 GMT

What problem you met? Could you discribe more about it?

Re: IMX8ULP Mode Registers LPDDR4

fisimalpro — Thu, 26 Dec 2024 09:33:46 GMT

I need to read mode registers 4, 5, 6, and 7 during the U-Boot phase. From the reference manual, it is not clear how to access these registers. A certain PERIPHERAL_MRR_DATA is mentioned, where the data of the requested MRR read should be located, but it does not specify in which register this is found. Furthermore, there is no indication of how to make a read request.

Re: IMX8ULP Mode Registers LPDDR4

fisimalpro — Sat, 28 Dec 2024 11:00:04 GMT

UP ??

Re: IMX8ULP Mode Registers LPDDR4

Rita_Wang — Tue, 07 Jan 2025 04:12:59 GMT

I will give you update late today.

Re: IMX8ULP Mode Registers LPDDR4

Rita_Wang — Wed, 08 Jan 2025 07:43:06 GMT

I see you also creat case to my colleague, he already give update to you, if still need help contact us freely.