<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: How to implement P2P on IMX8MP? in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/How-to-implement-P2P-on-IMX8MP/m-p/2016760#M232153</link>
    <description>&lt;P&gt;Thank you for your reply.&lt;/P&gt;&lt;P&gt;However, I am using the IMX8MP as an EP device, so I would like to know if the IMX8MP supports P2P in EP mode? If it does, how should it be configured? Thank you.&lt;/P&gt;</description>
    <pubDate>Thu, 19 Dec 2024 02:49:12 GMT</pubDate>
    <dc:creator>22721579</dc:creator>
    <dc:date>2024-12-19T02:49:12Z</dc:date>
    <item>
      <title>How to implement P2P on IMX8MP?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-implement-P2P-on-IMX8MP/m-p/2014273#M232029</link>
      <description>&lt;DIV class=""&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I would like to implement PCIe P2P transmission between the EP development board (configured with IMX8MP) and an NVMe SSD. Does the IMX8MP support P2P?&lt;/P&gt;&lt;P&gt;Are there any related reference materials available for learning?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;&lt;/DIV&gt;</description>
      <pubDate>Mon, 16 Dec 2024 08:15:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-implement-P2P-on-IMX8MP/m-p/2014273#M232029</guid>
      <dc:creator>22721579</dc:creator>
      <dc:date>2024-12-16T08:15:18Z</dc:date>
    </item>
    <item>
      <title>Re: How to implement P2P on IMX8MP?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-implement-P2P-on-IMX8MP/m-p/2014986#M232072</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/225641"&gt;@22721579&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;I found an article written by one of our in-house experts that I hope will help you:&lt;/P&gt;
&lt;P&gt;&lt;BR /&gt;1:On 8MP EVK board, base board resistor R452 should be changed to 0ohm.&lt;BR /&gt;2:This patch only done for 8MP/8MM EVK board.&lt;BR /&gt;&lt;BR /&gt;Be careful: this patch may impact previous 6/8 PCIE function.&lt;BR /&gt;&lt;BR /&gt;After merge this patch, in uboot, run below cmd to make NVME work:&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;u-boot=&amp;gt;pci e /* init pcie bus and enum devices */&lt;BR /&gt;u-boot=&amp;gt;nvme scan /* nvme scan devices */&lt;BR /&gt;u-boot=&amp;gt;pci 1 /* show pcie device info */&lt;BR /&gt;u-boot=&amp;gt;nvme info /* show nvme devcie info */&lt;BR /&gt;u-boot=&amp;gt;fatinfo nvme 0:1 /* asssue nvme first part is FAT */&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;B.R&lt;/P&gt;</description>
      <pubDate>Tue, 17 Dec 2024 07:22:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-implement-P2P-on-IMX8MP/m-p/2014986#M232072</guid>
      <dc:creator>pengyong_zhang</dc:creator>
      <dc:date>2024-12-17T07:22:06Z</dc:date>
    </item>
    <item>
      <title>Re: How to implement P2P on IMX8MP?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-implement-P2P-on-IMX8MP/m-p/2016760#M232153</link>
      <description>&lt;P&gt;Thank you for your reply.&lt;/P&gt;&lt;P&gt;However, I am using the IMX8MP as an EP device, so I would like to know if the IMX8MP supports P2P in EP mode? If it does, how should it be configured? Thank you.&lt;/P&gt;</description>
      <pubDate>Thu, 19 Dec 2024 02:49:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-implement-P2P-on-IMX8MP/m-p/2016760#M232153</guid>
      <dc:creator>22721579</dc:creator>
      <dc:date>2024-12-19T02:49:12Z</dc:date>
    </item>
    <item>
      <title>Re: How to implement P2P on IMX8MP?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-implement-P2P-on-IMX8MP/m-p/2017653#M232215</link>
      <description>&lt;P&gt;HI&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/225641"&gt;@22721579&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;i.MX 8MP does EP with other EP do P2P?&lt;/P&gt;
&lt;P&gt;B.R&lt;/P&gt;</description>
      <pubDate>Fri, 20 Dec 2024 06:09:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-implement-P2P-on-IMX8MP/m-p/2017653#M232215</guid>
      <dc:creator>pengyong_zhang</dc:creator>
      <dc:date>2024-12-20T06:09:12Z</dc:date>
    </item>
    <item>
      <title>Re: How to implement P2P on IMX8MP?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-implement-P2P-on-IMX8MP/m-p/2018942#M232306</link>
      <description>&lt;P&gt;The reason I am seeking help is that I am unsure whether the i.MX 8MP supports P2P.&lt;/P&gt;&lt;P&gt;From my observation, the i.MX 8MP EP does not map prefetchable space on the BAR. I am wondering if it is possible to configure a segment of prefetchable space in the i.MX 6ULL driver for P2P read and write operations.&lt;/P&gt;</description>
      <pubDate>Tue, 24 Dec 2024 07:23:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-implement-P2P-on-IMX8MP/m-p/2018942#M232306</guid>
      <dc:creator>22721579</dc:creator>
      <dc:date>2024-12-24T07:23:48Z</dc:date>
    </item>
    <item>
      <title>Re: How to implement P2P on IMX8MP?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-implement-P2P-on-IMX8MP/m-p/2019218#M232343</link>
      <description>&lt;P&gt;HI&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/225641"&gt;@22721579&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;We haven't done any tests like this, But i think if your&amp;nbsp;PCIe switch support, i.MX8MP can support it.&lt;/P&gt;
&lt;P&gt;B.R&lt;/P&gt;</description>
      <pubDate>Wed, 25 Dec 2024 05:25:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-implement-P2P-on-IMX8MP/m-p/2019218#M232343</guid>
      <dc:creator>pengyong_zhang</dc:creator>
      <dc:date>2024-12-25T05:25:19Z</dc:date>
    </item>
  </channel>
</rss>

