topic Re: IMX8QXP 2 x 1Gb Ethernet in i.MX Processors

IMX8QXP 2 x 1Gb Ethernet

Chethanbg — Thu, 20 Jun 2024 10:21:25 GMT

Dear NXP Team,

We are designing a custom SOM module using the IMX8QXP processor. We require two 1Gb Ethernet ports. According to the pin configuration of the MiMX8QX6AVLFZAC, the ENET interface pins B32 (ENET0_MDIO), D30 (ENET1_MDC), and F28 (ENET0_REFCLK_125M_25M) are shared between ENET0 and ENET1.

Can we connect these three pins to both Ethernet PHY ICs?

Below is the pin config tool image for your reference.

Re: IMX8QXP 2 x 1Gb Ethernet

Bio_TICFSL — Thu, 20 Jun 2024 15:36:09 GMT

Hello,

Yes, but you have to create the proper driver to work with it since linux BSP and/or android BSP works with one ethernet.

Regards

Re: IMX8QXP 2 x 1Gb Ethernet

Sadeed — Sat, 14 Dec 2024 12:16:10 GMT

Hi,
In the above topic I am working with chethan.

->Enet 0 is functional and we are able to ping through it. Here we are able to set IP address automaticlly.

->Enet 1 is not working, and not able to set IP address automatically, but manually we are able to set.

-> We have also tried to Up the ethernet individually(disabling ethernet 0 in the DTSI file), but ethernet 1 was not functional.

->Additionally, I am attaching the ethernet section Schematics, Logs and DTSI file in this post.

Thanks,
Sadeed