<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>i.MX ProcessorsのトピックRe: lpi2c3 on m33 core</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/lpi2c3-on-m33-core/m-p/2000721#M231144</link>
    <description>&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/206761"&gt;@Chavira&lt;/a&gt; thank you for the quick reply, it seems that I was inattentive, I reconfigured to pins ptb8-9 but this did not remove the error(HardFault_Handler) when calling the functions CLOCK_SetIpSrc, RESET_PeripheralReset and CLOCK_GetIpFreq (I call them with the parameters from the previous message) am I passing the wrong values ​​to them? Please tell me what could be wrong.</description>
    <pubDate>Mon, 25 Nov 2024 05:42:51 GMT</pubDate>
    <dc:creator>Sandroom</dc:creator>
    <dc:date>2024-11-25T05:42:51Z</dc:date>
    <item>
      <title>lpi2c3 on m33 core</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/lpi2c3-on-m33-core/m-p/1998854#M231080</link>
      <description>&lt;P&gt;&lt;SPAN&gt;Good day to all!&lt;/SPAN&gt;&lt;BR /&gt;I am using IMX8ULPIEC processor and I want to use i2c3 on m33 core.&lt;BR /&gt;I looked at &lt;STRONG&gt;sai_edma_transfer example&lt;/STRONG&gt;&amp;nbsp;(for evk9 board)and encountered a problem. The example uses lpi2c0, I would like to use lpi2c3, replacing 0 with 3 in places related to lpi2c I did not achieve the result. According to my assumption, lpi2c3 is on the fusion bus pcc2. Is it possible to use i2c3 with the m33 core and maybe there is some example of initialization and sending data?&lt;/P&gt;</description>
      <pubDate>Thu, 21 Nov 2024 11:20:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/lpi2c3-on-m33-core/m-p/1998854#M231080</guid>
      <dc:creator>Sandroom</dc:creator>
      <dc:date>2024-11-21T11:20:22Z</dc:date>
    </item>
    <item>
      <title>Re: lpi2c3 on m33 core</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/lpi2c3-on-m33-core/m-p/1999275#M231096</link>
      <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/242343"&gt;@Sandroom&lt;/a&gt;!&lt;/P&gt;
&lt;P&gt;Thank you for contacting NXP Support!&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;The changes that you made was only on sai_edma_transfer.c?&lt;/P&gt;
&lt;P&gt;What are the changes that you made off?&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Do you update the pin_mux.c to configure the pins?&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best Regards!&lt;/P&gt;
&lt;P&gt;Chavira&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 21 Nov 2024 18:57:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/lpi2c3-on-m33-core/m-p/1999275#M231096</guid>
      <dc:creator>Chavira</dc:creator>
      <dc:date>2024-11-21T18:57:35Z</dc:date>
    </item>
    <item>
      <title>Re: lpi2c3 on m33 core</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/lpi2c3-on-m33-core/m-p/1999769#M231104</link>
      <description>&lt;P&gt;&lt;A href="https://community.nxp.com/t5/user/viewprofilepage/user-id/206761" target="_self"&gt;&lt;SPAN class=""&gt;Chavira&lt;/SPAN&gt;&lt;/A&gt;,&amp;nbsp;thank you for helping me with my question.&lt;/P&gt;&lt;P&gt;I made the following changes to pin_mux:&lt;/P&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;in func &lt;/SPAN&gt;&lt;STRONG&gt;BOARD_InitPins(void)&amp;nbsp;&lt;/STRONG&gt;Instead of i2c0 pins, I initialize i2c3: pta8,9-&amp;gt; pta14,15&lt;STRONG&gt;&lt;BR /&gt;&lt;/STRONG&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;LI-CODE lang="c"&gt;    IOMUXC_SetPinMux(IOMUXC_PTA14_PTA14, 0U);
    IOMUXC_SetPinConfig(IOMUXC_PTA14_PTA14,
                        IOMUXC_PCR_OBE_MASK);
    IOMUXC_SetPinMux(IOMUXC_PTA15_PTA15, 0U);
    IOMUXC_SetPinConfig(IOMUXC_PTA15_PTA15,
                        IOMUXC_PCR_OBE_MASK);&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;DIV&gt;&lt;SPAN&gt;&lt;SPAN&gt;&amp;nbsp;also in&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;STRONG&gt;&lt;STRONG&gt;&lt;SPAN&gt;BOARD_I2C_ConfigurePins&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;void&lt;/SPAN&gt;&lt;SPAN&gt;&lt;LI-EMOJI id="lia_disappointed-face" title=":disappointed_face:"&gt;&lt;/LI-EMOJI&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;/STRONG&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;/DIV&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;LI-CODE lang="c"&gt;    IOMUXC_SetPinMux(IOMUXC_PTA14_I3C0_SCL, 0U);
    IOMUXC_SetPinConfig(IOMUXC_PTA14_I3C0_SCL,
                        IOMUXC_PCR_ODE_MASK);
    IOMUXC_SetPinMux(IOMUXC_PTA15_I3C0_SDA, 0U);
    IOMUXC_SetPinConfig(IOMUXC_PTA15_I3C0_SDA,
                        IOMUXC_PCR_ODE_MASK);&lt;/LI-CODE&gt;&lt;P&gt;in&amp;nbsp;sai_edma_transfer.c&lt;STRONG&gt;&lt;STRONG&gt;&lt;SPAN&gt;&lt;SPAN&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;/STRONG&gt;i use&amp;nbsp;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;STRONG&gt;&lt;SPAN&gt;Fusion_Init&lt;/SPAN&gt;&lt;SPAN&gt;() &lt;/SPAN&gt;&lt;/STRONG&gt;&lt;SPAN&gt;&lt;SPAN&gt;and some else functions:&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;CLOCK_SetIpSrc(kCLOCK_Lpi2c3, &amp;nbsp;kCLOCK_Pcc2BusIpSrcFusionDspBus);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;RESET_PeripheralReset(kRESET_Lpi2c3);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;CLOCK_GetIpFreq&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;kCLOCK_Lpi2c3&lt;/SPAN&gt;&lt;SPAN&gt;)&lt;BR /&gt;but when using the last three I get a call to HardFault_Handler.&lt;BR /&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;it was just said in one of the other answers (&lt;A href="https://community.nxp.com/t5/i-MX-Processors/IMX8ULP-Assign-a-peripheral-from-M33-to-A35/m-p/1824017" target="_blank" rel="noopener"&gt;link&lt;/A&gt;) that the cores cannot use foreign peripherals (for example, sending data from the m33 core via sai4, which belongs to the A35 core) or is this not true?&lt;/SPAN&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;</description>
      <pubDate>Fri, 22 Nov 2024 05:46:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/lpi2c3-on-m33-core/m-p/1999769#M231104</guid>
      <dc:creator>Sandroom</dc:creator>
      <dc:date>2024-11-22T05:46:12Z</dc:date>
    </item>
    <item>
      <title>Re: lpi2c3 on m33 core</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/lpi2c3-on-m33-core/m-p/2000247#M231126</link>
      <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/242343"&gt;@Sandroom&lt;/a&gt;!&lt;/P&gt;
&lt;P&gt;You configured wrong the pins for i2c3, you are configuring the pins for i3c0, you should use ptb8-9 or ptb11-12.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best Regards!&lt;/P&gt;
&lt;P&gt;Chavira&lt;/P&gt;</description>
      <pubDate>Fri, 22 Nov 2024 15:52:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/lpi2c3-on-m33-core/m-p/2000247#M231126</guid>
      <dc:creator>Chavira</dc:creator>
      <dc:date>2024-11-22T15:52:12Z</dc:date>
    </item>
    <item>
      <title>Re: lpi2c3 on m33 core</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/lpi2c3-on-m33-core/m-p/2000721#M231144</link>
      <description>&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/206761"&gt;@Chavira&lt;/a&gt; thank you for the quick reply, it seems that I was inattentive, I reconfigured to pins ptb8-9 but this did not remove the error(HardFault_Handler) when calling the functions CLOCK_SetIpSrc, RESET_PeripheralReset and CLOCK_GetIpFreq (I call them with the parameters from the previous message) am I passing the wrong values ​​to them? Please tell me what could be wrong.</description>
      <pubDate>Mon, 25 Nov 2024 05:42:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/lpi2c3-on-m33-core/m-p/2000721#M231144</guid>
      <dc:creator>Sandroom</dc:creator>
      <dc:date>2024-11-25T05:42:51Z</dc:date>
    </item>
    <item>
      <title>Re: lpi2c3 on m33 core</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/lpi2c3-on-m33-core/m-p/2080473#M236318</link>
      <description>&lt;P&gt;Hello, I 'm facing the same situation with you.How do you configure the CLK issue?&lt;/P&gt;</description>
      <pubDate>Tue, 15 Apr 2025 05:48:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/lpi2c3-on-m33-core/m-p/2080473#M236318</guid>
      <dc:creator>wendy-liu</dc:creator>
      <dc:date>2025-04-15T05:48:46Z</dc:date>
    </item>
  </channel>
</rss>

