i.MX ProcessorsのトピックRe: ROM Event on i.MX8M

ROM Event on i.MX8M

spthx — Thu, 07 Nov 2024 07:18:10 GMT

I want to get ROM Event on an RTOS application running on i.MX8MN.
How can I get ROM Event of i.MX8M series?
I read AN12853, but I couldn't figure out which one applies to i.MX8M.

Re: ROM Event on i.MX8M

Manuel_Salas — Tue, 12 Nov 2024 15:31:22 GMT

Hello @spthx

I hope you are doing very well.

As you can see on the AN12853, the ROM event log buffer is located at a fixed address in the on-chip RAM:

Please refer to the Mscale Series.

Best regards,

Salas.

Re: ROM Event on i.MX8M

spthx — Wed, 13 Nov 2024 00:25:13 GMT

Thanks for the reply.
I was able to check the logs.

Is there any documentation with details of the parameters?
I am trying HAB and I found a log of 0xA0:Image authentication result in the ROM Event ID definition version 2, but I would like to know what that Parameter0 value means.
Currently I only know that it is not 0xF0 and that it does not pass.

Re: ROM Event on i.MX8M

MB_stek — Fri, 14 Mar 2025 08:06:51 GMT

Hi,

I'm currently trying to get mainline u-boot v2025.01 running on an i.MX8MM on a custom board. However, we're stuck in the boot loader and don't get output via serial interface. So, I connected a J-Link base and read out the registers. Found out that SPL obviously returns to Boot ROM (as the PC is in the Boot ROM range when halting the Cortex-A53), so I wanted to read out the ROM event log buffer to get more info.

Having found this post, I tried also with 0x9E0 as address, but the output doesn't seem to make sense:

---

Cortex-A53 identified.
J-Link>halt
PC = 00000000000160C4
CPSR = 600003CD (AArch64, EL3h (SP_EL3) mode, IRQ masked, FIQ masked)
SP = 0000000000901F40
ELR_EL1 = 2280006102140688 ELR_EL2 = A700010002088A08
ELR_EL3 = 0000000000016390
SP_EL0 = 01C0000202200002 SP_EL1 = 030C001080440040
SP_EL2 = 000000002002F0F3 SP_EL3 = 0000000000901F40
R0 = 000000000090CC90, R1 = 0000000000000006
R2 = 0000000000901DFB, R3 = 0000000000000000
R4 = 000000000000C1DC, R5 = 0000000000901DFC
R6 = 0000000000000000, R7 = 0000000000000000
R8 = 0000000000000000, R9 = 0000000000000180
R10 = 0000000000000047, R11 = 0000000000000000
R12 = 000000000090B5E0, R13 = 000000000090B528
R14 = 0000000000004000, R15 = 000000000090B5E0
R16 = 0000000000000000, R17 = 0000000000000000
R18 = 0000000000000000, R19 = 0000000030350480
R20 = 000000000000000F, R21 = 000000000090E6D8
R22 = 000000000090C000, R23 = 0000000030350480
R24 = 0000000000000002, R25 = 0000000000910000
R26 = 0000000030390070, R27 = 0000000072000000
R28 = 0000000000000000, R29 = 0000000000901F40
R30 = 00000000000160C4, R31 = 0000000000000000
JMISC = 0000000000000008
J-Link>mem32 0x9E0 4
000009E0 = 0090E558 00000000 0090E6D8 00000000
J-Link>

---

Is 0x9E0 the correct buffer address also for ixm8m Mini (not only for Nano)? AN12853 is not very clear in this regard...

If this is correct, the read data doesn't make sense to me since the first 8 bits should be the ROM event ID (starting with 0x01), but were read as 0x00? Or did I make some mistake in interpreting here?

Kind regards,

Markus

Re: ROM Event on i.MX8M

spthx — Fri, 14 Mar 2025 12:07:34 GMT

Hi,

Check the OCRAM starting from address 0x90E558.
You should find the ROM event buffer there.

The OCRAM address pointed to by 0x9E0 should correspond to the ROM event buffer.

Regards,

Re: ROM Event on i.MX8M

MB_stek — Mon, 17 Mar 2025 09:52:32 GMT

Thanks for clarifying! Could successfully read from 0x0090E558 and the value there seem to make sense.

Kind regards,

Markus