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    <title>i.MX ProcessorsのトピックRT118x dual core in RAM</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/RT118x-dual-core-in-RAM/m-p/1987136#M230450</link>
    <description>&lt;P&gt;Hi,&amp;nbsp;&lt;BR /&gt;I am currently looking for some examples of dual core applications running both CM33 and CM7 in the internal RAM.&lt;BR /&gt;I currently have a NOR flash XIP application launching the CM7 and it's working fine.&lt;BR /&gt;Now, I am trying to run the CM33 application in the device's RAM instead of the NOR flash.&lt;BR /&gt;If the CM33 core is running alone, I have no issue, everything is working fine. But as soon as i am linking the CM7 binary in my IDE (IAR workbench), I still can build the application but I am not able to load the application in the device with JLink anymore, I encounter a loader error.&lt;BR /&gt;I tried to look in the SDK's example, but I cannot find anything running both core in RAM.&lt;BR /&gt;Is it possible to do?&lt;BR /&gt;Is there any example I can try for the imxrt118x family?&lt;BR /&gt;I link the icf files if that can help&lt;BR /&gt;&lt;BR /&gt;Thanks for your time,&amp;nbsp;&lt;BR /&gt;and if this is not clear do not hesitate&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;IAR JLink loader error :&lt;/P&gt;&lt;DIV&gt;&lt;SPAN&gt;Flash download warning: 1024 out of 1024 bytes from data record CODE:[0xffe'0000,0xffe'03ff] will not be flashed &lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp;Flash download warning: 119040 out of 119040 bytes from data record CODE:[0xffe'0400,0xfff'd4ff] will not be flashed &lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;There were warnings while generating flash loader input.&lt;BR /&gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;Maurice&lt;/SPAN&gt;&lt;/DIV&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Mon, 04 Nov 2024 15:12:08 GMT</pubDate>
    <dc:creator>lambemau</dc:creator>
    <dc:date>2024-11-04T15:12:08Z</dc:date>
    <item>
      <title>RT118x dual core in RAM</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/RT118x-dual-core-in-RAM/m-p/1987136#M230450</link>
      <description>&lt;P&gt;Hi,&amp;nbsp;&lt;BR /&gt;I am currently looking for some examples of dual core applications running both CM33 and CM7 in the internal RAM.&lt;BR /&gt;I currently have a NOR flash XIP application launching the CM7 and it's working fine.&lt;BR /&gt;Now, I am trying to run the CM33 application in the device's RAM instead of the NOR flash.&lt;BR /&gt;If the CM33 core is running alone, I have no issue, everything is working fine. But as soon as i am linking the CM7 binary in my IDE (IAR workbench), I still can build the application but I am not able to load the application in the device with JLink anymore, I encounter a loader error.&lt;BR /&gt;I tried to look in the SDK's example, but I cannot find anything running both core in RAM.&lt;BR /&gt;Is it possible to do?&lt;BR /&gt;Is there any example I can try for the imxrt118x family?&lt;BR /&gt;I link the icf files if that can help&lt;BR /&gt;&lt;BR /&gt;Thanks for your time,&amp;nbsp;&lt;BR /&gt;and if this is not clear do not hesitate&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;IAR JLink loader error :&lt;/P&gt;&lt;DIV&gt;&lt;SPAN&gt;Flash download warning: 1024 out of 1024 bytes from data record CODE:[0xffe'0000,0xffe'03ff] will not be flashed &lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp;Flash download warning: 119040 out of 119040 bytes from data record CODE:[0xffe'0400,0xfff'd4ff] will not be flashed &lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;There were warnings while generating flash loader input.&lt;BR /&gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;Maurice&lt;/SPAN&gt;&lt;/DIV&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 04 Nov 2024 15:12:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/RT118x-dual-core-in-RAM/m-p/1987136#M230450</guid>
      <dc:creator>lambemau</dc:creator>
      <dc:date>2024-11-04T15:12:08Z</dc:date>
    </item>
    <item>
      <title>Re: RT118x dual core in RAM</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/RT118x-dual-core-in-RAM/m-p/1992647#M230752</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/220372"&gt;@lambemau&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;The following steps is what I tested based on the dual core project - hello world.&lt;/P&gt;
&lt;P&gt;1. copy&amp;nbsp;MIMXRT1189xxxxx_cm33_ram.icf from&amp;nbsp;SDK_2_16_100_MIMXRT1180-EVK\boards\evkmimxrt1180\demo_apps\hello_world\cm33\iar&amp;nbsp; to&amp;nbsp;SDK_2_16_100_MIMXRT1180-EVK\boards\evkmimxrt1180\multicore_examples\hello_world\cm33\iar&amp;nbsp;&lt;/P&gt;
&lt;P&gt;2. open the workspace file in&amp;nbsp;SDK_2_16_100_MIMXRT1180-EVK\boards\evkmimxrt1180\multicore_examples\hello_world\cm33\iar and create a new configuration such as sram_debug based on&amp;nbsp;flexspi_nor_debug.&lt;/P&gt;
&lt;P&gt;3. edit the options in sram_debug:&lt;/P&gt;
&lt;P&gt;a) C/C++ compiler-&amp;gt;Preprocessor-&amp;gt;defined symbols:&lt;/P&gt;
&lt;P&gt;XIP_EXTERNAL_FLASH=0&lt;/P&gt;
&lt;P&gt;XIP_BOOT_HEADER_ENABLE=0&lt;/P&gt;
&lt;P&gt;b) Linker-&amp;gt;Config-&amp;gt;Linker Configuration File: $PROJ_DIR$\MIMXRT1189xxxxx_cm33_ram.icf&lt;/P&gt;
&lt;P&gt;4. open workspace file in&amp;nbsp;C:\install\SDK Archive\SDK_2_16_100_MIMXRT1180-EVK\boards\evkmimxrt1180\multicore_examples\hello_world\cm7\iar, and build&lt;/P&gt;
&lt;P&gt;5. switch to cm33 workspace and build and click the button for Download and Debug&lt;/P&gt;
&lt;P&gt;6. two debug sessions will come out and one for cm33 the other for cm7, start cm33 debug at first and then start cm7 debug.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Kan_Li_0-1731399755154.png" style="width: 705px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/310000i8287571788034A38/image-dimensions/705x155?v=v2" width="705" height="155" role="button" title="Kan_Li_0-1731399755154.png" alt="Kan_Li_0-1731399755154.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Kan_Li_1-1731399800242.png" style="width: 670px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/310002i6703910D1464333A/image-dimensions/670x414?v=v2" width="670" height="414" role="button" title="Kan_Li_1-1731399800242.png" alt="Kan_Li_1-1731399800242.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;BTW, IAR 9.60.3 was used in this test, and debug interface was CMSIS DAP.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Hope that helps,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Have a great day,&lt;BR /&gt;Kan&lt;/P&gt;
&lt;P&gt;&lt;BR /&gt;-------------------------------------------------------------------------------&lt;BR /&gt;Note:&lt;BR /&gt;- If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;BR /&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;BR /&gt;Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;BR /&gt;-------------------------------------------------------------------------------&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 12 Nov 2024 08:25:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/RT118x-dual-core-in-RAM/m-p/1992647#M230752</guid>
      <dc:creator>Kan_Li</dc:creator>
      <dc:date>2024-11-12T08:25:08Z</dc:date>
    </item>
    <item>
      <title>Re: RT118x dual core in RAM</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/RT118x-dual-core-in-RAM/m-p/1993638#M230809</link>
      <description>&lt;P&gt;Thanks&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/59276"&gt;@Kan_Li&lt;/a&gt;,&lt;BR /&gt;I do not have these examples in my old SDK v14.&lt;BR /&gt;With these nex ICF example I can flash my device properly using them as reference.&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 13 Nov 2024 10:43:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/RT118x-dual-core-in-RAM/m-p/1993638#M230809</guid>
      <dc:creator>lambemau</dc:creator>
      <dc:date>2024-11-13T10:43:59Z</dc:date>
    </item>
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