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    <title>topic Re: i.MX8 MAX9296 Stream Problem in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8-MAX9296-Stream-Problem/m-p/1986677#M230405</link>
    <description>&lt;P&gt;could you share the full logfile and dts file? and tell me what bsp version you use&lt;/P&gt;</description>
    <pubDate>Mon, 04 Nov 2024 03:15:30 GMT</pubDate>
    <dc:creator>joanxie</dc:creator>
    <dc:date>2024-11-04T03:15:30Z</dc:date>
    <item>
      <title>i.MX8 MAX9296 Stream Problem</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8-MAX9296-Stream-Problem/m-p/1984693#M230287</link>
      <description>&lt;P&gt;Hi all,&lt;BR /&gt;&lt;BR /&gt;I can get a stream using the following device-tree settings without an MAX9296 from my camera:&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;/ {
	fragment@7 {
		target = &amp;lt;&amp;amp;i2c_mipi_csi0&amp;gt;;
		__overlay__ {
			#address-cells = &amp;lt;1&amp;gt;;
			#size-cells = &amp;lt;0&amp;gt;;
			status = "okay";
			pinctrl-names = "default";
			pinctrl-0 = &amp;lt;&amp;amp;pinctrl_i2c_mipi_csi0&amp;gt;;
			as0149_mipi_0: as0149_mipi@5d {
					compatible = "as0149";
					reg = &amp;lt;0x5d&amp;gt;;
                clocks = &amp;lt;&amp;amp;xtal24m&amp;gt;;
                clock-names = "xclk";
                csi_id = &amp;lt;0&amp;gt;;
                mclk = &amp;lt;24000000&amp;gt;;
                mclk_source = &amp;lt;0&amp;gt;;
                mipi_csi;
                status = "okay";
                port {
						as0149_mipi_ep_0: endpoint {
                        remote-endpoint = &amp;lt;&amp;amp;mipi_csi0_ep&amp;gt;;
                        data-lanes = &amp;lt;1 2&amp;gt;;
                        clocks-lanes = &amp;lt;0&amp;gt;;
                    };
                };
			};

		};
	};

	fragment@8 {
		target = &amp;lt;&amp;amp;i2c_mipi_csi1&amp;gt;;
		__overlay__ {
			#address-cells = &amp;lt;1&amp;gt;;
			#size-cells = &amp;lt;0&amp;gt;;
			status = "okay";
			pinctrl-names = "default";
			pinctrl-0 = &amp;lt;&amp;amp;pinctrl_i2c_mipi_csi1&amp;gt;;
			as0149_mipi_1: as0149_mipi@5d {
				compatible = "as0149";
				reg = &amp;lt;0x5d&amp;gt;;
                clocks = &amp;lt;&amp;amp;xtal24m&amp;gt;;
                clock-names = "xclk";
                csi_id = &amp;lt;0&amp;gt;;
                mclk = &amp;lt;24000000&amp;gt;;
                mclk_source = &amp;lt;0&amp;gt;;
                mipi_csi;
                status = "okay";
                port {
					as0149_mipi_ep_1: endpoint {
                        remote-endpoint = &amp;lt;&amp;amp;mipi_csi1_ep&amp;gt;;
                        data-lanes = &amp;lt;1 2&amp;gt;;
                        clocks-lanes = &amp;lt;0&amp;gt;;
                    };
                };
			};
		};
	};

	fragment@9 {
		target = &amp;lt;&amp;amp;irqsteer_csi0&amp;gt;;
		__overlay__ {
			status = "okay";
		};
	};

	fragment@10 {
		target = &amp;lt;&amp;amp;irqsteer_csi1&amp;gt;;
		__overlay__ {
			status = "okay";
		};
	};

	fragment@11 {
		target = &amp;lt;&amp;amp;mipi_csi_0&amp;gt;;
		__overlay__  {
			#address-cells = &amp;lt;1&amp;gt;;
			#size-cells = &amp;lt;0&amp;gt;;
			/delete-property/virtual-channel;
			status = "okay";

			/* Camera 0  MIPI CSI-2 (CSIS0) */
			port@0 {
				reg = &amp;lt;0&amp;gt;;
				mipi_csi0_ep: endpoint {
					remote-endpoint = &amp;lt;&amp;amp;as0149_mipi_ep_0&amp;gt;;
                   	data-lanes = &amp;lt;1 2&amp;gt;;
               	};
			};
		};
	};

	fragment@12 {
		target = &amp;lt;&amp;amp;isi_0&amp;gt;;
		__overlay__ {
			status = "okay";

			cap_device {
				status = "okay";
			};

			m2m_device {
				status = "okay";
			};
		};
	};

	fragment@13 {
		target = &amp;lt;&amp;amp;mipi_csi_1&amp;gt;;
		__overlay__  {
			#address-cells = &amp;lt;1&amp;gt;;
			#size-cells = &amp;lt;0&amp;gt;;
			/delete-property/virtual-channel;
			status = "okay";

			/* Camera 1  MIPI CSI-2 (CSIS1) */
			port@1 {
               	reg = &amp;lt;1&amp;gt;;
           		mipi_csi1_ep: endpoint {
					remote-endpoint = &amp;lt;&amp;amp;as0149_mipi_ep_1&amp;gt;;
                   	data-lanes = &amp;lt;1 2&amp;gt;;			
				};
			};
		};
	};

	fragment@14 {
		target = &amp;lt;&amp;amp;isi_4&amp;gt;;
		__overlay__ {
			status = "okay";

			cap_device {
				status = "okay";
			};

			m2m_device {
				status = "okay";
			};
		};
	};

};&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;However, when I add max9296 driver inside of my camera driver I get the following output:&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="kayakaantuna_0-1730286144432.jpeg" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/307682i50443683D970C434/image-size/medium?v=v2&amp;amp;px=400" role="button" title="kayakaantuna_0-1730286144432.jpeg" alt="kayakaantuna_0-1730286144432.jpeg" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;BR /&gt;I check my max9296 and as0149 status registers, both with no error and both stating they are on stream.&lt;BR /&gt;&lt;BR /&gt;Input and output format also seems correct by looking at the dmesg log below:&lt;BR /&gt;&lt;BR /&gt;[ 884.552763] bypass csc&lt;BR /&gt;[ 884.555176] input fmt UYVY&lt;BR /&gt;[ 884.557914] output fmt UYVY&lt;BR /&gt;&lt;BR /&gt;Only thing that came to my mind right now is the pixel clock. I set it like below at the momment:&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;port {
					as0149_serdes_ep_0: endpoint {
						data-lanes = &amp;lt;1 2&amp;gt;;
						clocks-lanes = &amp;lt;0&amp;gt;;
						/*clock-noncontinuous;*/
						link-frequencies = /bits/ 64 &amp;lt;833333333&amp;gt;;
						//max-pixel-frequency = /bits/ 64 &amp;lt;100000000&amp;gt;;
						remote-endpoint = &amp;lt;&amp;amp;mipi_csi0_ep_0&amp;gt;;
					};

...

            port@0 {
                reg = &amp;lt;0&amp;gt;;
                mipi_csi0_ep_0: endpoint {
                    remote-endpoint = &amp;lt;&amp;amp;as0149_serdes_ep_0&amp;gt;;
                    data-lanes = &amp;lt;1 2&amp;gt;;
					csis-hs-settle = &amp;lt;18&amp;gt;;
               		csis-clk-settle = &amp;lt;2&amp;gt;;
					csis-wclk;
                };
&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;does this correct setting for 833333333 pixel clock ? Or these values does nothing ? Can any of you guide me on this one ?&lt;/P&gt;&lt;P&gt;Thanks.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 30 Oct 2024 11:05:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8-MAX9296-Stream-Problem/m-p/1984693#M230287</guid>
      <dc:creator>kayakaantuna</dc:creator>
      <dc:date>2024-10-30T11:05:52Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8 MAX9296 Stream Problem</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8-MAX9296-Stream-Problem/m-p/1986677#M230405</link>
      <description>&lt;P&gt;could you share the full logfile and dts file? and tell me what bsp version you use&lt;/P&gt;</description>
      <pubDate>Mon, 04 Nov 2024 03:15:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8-MAX9296-Stream-Problem/m-p/1986677#M230405</guid>
      <dc:creator>joanxie</dc:creator>
      <dc:date>2024-11-04T03:15:30Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8 MAX9296 Stream Problem</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8-MAX9296-Stream-Problem/m-p/2020482#M232464</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/39586"&gt;@joanxie&lt;/a&gt;&amp;nbsp;,&lt;BR /&gt;&lt;BR /&gt;I debug my way to found a solution for this. Please refer to below patch:&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;LI-CODE lang="c"&gt;diff --git a/drivers/staging/media/imx/imx8-mipi-csi2.c b/drivers/staging/media/imx/imx8-mipi-csi2.c
index 3c628fb1b..9f47bb9ca 100644
--- a/drivers/staging/media/imx/imx8-mipi-csi2.c
+++ b/drivers/staging/media/imx/imx8-mipi-csi2.c
@@ -332,7 +332,7 @@ static struct mxc_hs_info hs_setting[] = {
 
 	{1920, 1080, 30, 0x0B},
 	{1920, 1080, 15, 0x10},
-
+	{1280, 960,  30, 0x6},
 	{1280, 720,  30, 0x11},
 	{1280, 720,  15, 0x16},&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;so basically, `&amp;nbsp;link-frequencies = /bits/ 64 &amp;lt;833333333&amp;gt;;` have no use on device tree. instead you need to change the hs clock according to the table below:&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Screenshot from 2024-11-04 09-08-54.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/317646iD917DC0752D9FC72/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Screenshot from 2024-11-04 09-08-54.png" alt="Screenshot from 2024-11-04 09-08-54.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt; &lt;BR /&gt;as you can see by the table 1.5 Gbps, is what I was needed. Once I set the HS timer for my MIPI data rate, it worked like a charm.&lt;BR /&gt;&lt;BR /&gt;Hopefully it will help someone in the future.&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 30 Dec 2024 10:46:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8-MAX9296-Stream-Problem/m-p/2020482#M232464</guid>
      <dc:creator>kayakaantuna</dc:creator>
      <dc:date>2024-12-30T10:46:06Z</dc:date>
    </item>
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