<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: iMX8MP SPI BUFFER in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/iMX8MP-SPI-BUFFER/m-p/1986299#M230380</link>
    <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;With i.MX8Mplus you have QSPI, that manage all stream that are not in SPI speed in a buffer. If&amp;nbsp; you application overpassed the buffer it send you an interrupt and the communication is not for the speed spi.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards&lt;/P&gt;</description>
    <pubDate>Fri, 01 Nov 2024 13:59:06 GMT</pubDate>
    <dc:creator>Bio_TICFSL</dc:creator>
    <dc:date>2024-11-01T13:59:06Z</dc:date>
    <item>
      <title>iMX8MP SPI BUFFER</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX8MP-SPI-BUFFER/m-p/1985767#M230354</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;On our custom board, we plan to use an MCU alongside the i.MX8MP to handle time-critical I/O operations. The MCU will report the state of these I/Os to the i.MX8MP over SPI, with the MCU configured as the SPI master. We’re concerned about potential data loss: can the i.MX8MP reliably buffer incoming data from the MCU to prevent this? Does iMX8mp have this kind of buffer for spi? Additionally, any insights on the i.MX8MP's ability to manage continuous SPI data streams would be greatly appreciated.&lt;/P&gt;&lt;P&gt;Thanks!&lt;/P&gt;&lt;P&gt;Best Regards.&lt;/P&gt;</description>
      <pubDate>Thu, 31 Oct 2024 19:38:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX8MP-SPI-BUFFER/m-p/1985767#M230354</guid>
      <dc:creator>Wobaffet</dc:creator>
      <dc:date>2024-10-31T19:38:45Z</dc:date>
    </item>
    <item>
      <title>Re: iMX8MP SPI BUFFER</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX8MP-SPI-BUFFER/m-p/1986299#M230380</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;With i.MX8Mplus you have QSPI, that manage all stream that are not in SPI speed in a buffer. If&amp;nbsp; you application overpassed the buffer it send you an interrupt and the communication is not for the speed spi.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards&lt;/P&gt;</description>
      <pubDate>Fri, 01 Nov 2024 13:59:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX8MP-SPI-BUFFER/m-p/1986299#M230380</guid>
      <dc:creator>Bio_TICFSL</dc:creator>
      <dc:date>2024-11-01T13:59:06Z</dc:date>
    </item>
    <item>
      <title>Re: iMX8MP SPI BUFFER</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX8MP-SPI-BUFFER/m-p/1987981#M230516</link>
      <description>&lt;P&gt;Hello, thank you for the reply,&lt;/P&gt;&lt;P&gt;So you are saying that SPI is not suggested, it could cause data loss when MPU is configured as slave and buffer of the SPI won't be enough. Then CAN bus could be used for our case? Could the buffer on the CAN bus would be sufficient for our use case?&lt;/P&gt;&lt;P&gt;Thank you in advance!&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 05 Nov 2024 13:46:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX8MP-SPI-BUFFER/m-p/1987981#M230516</guid>
      <dc:creator>Wobaffet</dc:creator>
      <dc:date>2024-11-05T13:46:08Z</dc:date>
    </item>
  </channel>
</rss>

