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    <title>i.MX ProcessorsのトピックPmic on Sabre mcimx6q-sdb</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Pmic-on-Sabre-mcimx6q-sdb/m-p/251406#M23012</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Looking at the architecture on the Sabre mcimx6q-SDB board, i wonder if pmic pf0100 is in a default case or has been set up by Freescale.&lt;/P&gt;&lt;P&gt;Since Vddotp pin is set up to gnd, the hard-coded configuration is not used and voltages in the board reveals pre-programmed otp configuration F0 would be used (Table9 in PF0100 manual).&lt;/P&gt;&lt;P&gt;It would seem these pre-programmed otp configuration are set up at the factory, is it really the case ?&lt;/P&gt;&lt;P&gt;On the Sabre board, i wonder if the pmic has to be configurated by I2c or fuse-burned, to be able to corretly work ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Rgds,&lt;/P&gt;&lt;P&gt;Christophe&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 07 Feb 2013 14:15:03 GMT</pubDate>
    <dc:creator>christophe</dc:creator>
    <dc:date>2013-02-07T14:15:03Z</dc:date>
    <item>
      <title>Pmic on Sabre mcimx6q-sdb</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Pmic-on-Sabre-mcimx6q-sdb/m-p/251406#M23012</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Looking at the architecture on the Sabre mcimx6q-SDB board, i wonder if pmic pf0100 is in a default case or has been set up by Freescale.&lt;/P&gt;&lt;P&gt;Since Vddotp pin is set up to gnd, the hard-coded configuration is not used and voltages in the board reveals pre-programmed otp configuration F0 would be used (Table9 in PF0100 manual).&lt;/P&gt;&lt;P&gt;It would seem these pre-programmed otp configuration are set up at the factory, is it really the case ?&lt;/P&gt;&lt;P&gt;On the Sabre board, i wonder if the pmic has to be configurated by I2c or fuse-burned, to be able to corretly work ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Rgds,&lt;/P&gt;&lt;P&gt;Christophe&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 07 Feb 2013 14:15:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Pmic-on-Sabre-mcimx6q-sdb/m-p/251406#M23012</guid>
      <dc:creator>christophe</dc:creator>
      <dc:date>2013-02-07T14:15:03Z</dc:date>
    </item>
    <item>
      <title>Re: Pmic on Sabre mcimx6q-sdb</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Pmic-on-Sabre-mcimx6q-sdb/m-p/251407#M23013</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Christophe,&lt;/P&gt;&lt;P&gt;Yes, the SabreSD requires a pre-programmed otp configuration.&amp;nbsp; The PF0100 can be ordered unprogrammed, pre-programmed per the datasheet configurations (i.e F0,F1,F2) or a custom configuration.&amp;nbsp; The SabreSD board provides the hooks to be able to program in-circuit using the I2C interface.&amp;nbsp; Note, there is a PF0100 programmer available: &lt;A href="http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=KITPFPGMEVME&amp;amp;fr=gtl"&gt;http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=KITPFPGMEVME&amp;amp;fr=gtl&lt;/A&gt;&lt;/P&gt;&lt;P&gt;-peter&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 07 Feb 2013 16:10:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Pmic-on-Sabre-mcimx6q-sdb/m-p/251407#M23013</guid>
      <dc:creator>peter_pinewski</dc:creator>
      <dc:date>2013-02-07T16:10:53Z</dc:date>
    </item>
    <item>
      <title>Re: Pmic on Sabre mcimx6q-sdb</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Pmic-on-Sabre-mcimx6q-sdb/m-p/251408#M23014</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thank you.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 07 Feb 2013 17:22:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Pmic-on-Sabre-mcimx6q-sdb/m-p/251408#M23014</guid>
      <dc:creator>christophe</dc:creator>
      <dc:date>2013-02-07T17:22:13Z</dc:date>
    </item>
    <item>
      <title>Re: Pmic on Sabre mcimx6q-sdb</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Pmic-on-Sabre-mcimx6q-sdb/m-p/251409#M23015</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Peter,&lt;/P&gt;&lt;P&gt;Is it possible too, to order imx6 chips with custom programmed fuses (boot fuses) ?&lt;/P&gt;&lt;P&gt;Rgds,&lt;/P&gt;&lt;P&gt;CC&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 28 Feb 2013 08:23:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Pmic-on-Sabre-mcimx6q-sdb/m-p/251409#M23015</guid>
      <dc:creator>christophe</dc:creator>
      <dc:date>2013-02-28T08:23:42Z</dc:date>
    </item>
    <item>
      <title>Re: Pmic on Sabre mcimx6q-sdb</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Pmic-on-Sabre-mcimx6q-sdb/m-p/251410#M23016</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Sorry FSL does not program the mx6 fuses but it is simple to do in u-boot.&lt;/P&gt;&lt;P&gt;There is a command in u-boot called imxotp that allows fuses to be blown.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Note: to boot from fuses, you need two things:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1.       Boot mode pins  set correctly (this is a Hardware setting)--- BOOT_MODE[1:0]=0x00&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;2.       The boot from fuses bit in the fuse map must be blown   (this is BT_FUSE_SEL.  The command is:   imxotp blow --force 6 0x10)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Two examples are shown below: (boot from SD Card and boot from SATA)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;SD Card: 4-bit bus width, running on USDHC-3&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-          Only need to blow BOOT_CFG1[6], BOOT_CFG2[5], and BOOT_CFG2[4]. All other fuses remain at “0”.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-          Sequence from U-Boot:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Ø  imxotp blow --force 5 0x3040   ;BOOT_CFG1[6],BOOT_CFG2[5],BOOT_CFG2[4]&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Ø  imxotp blow --force 6 0x10     ;BT_FUSE_SEL&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;SATA&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-          Only need to blow BOOT_CFG1[5]. All other fuses remain at “0”.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-          Sequence from U-Boot:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Ø  imxotp blow --force 5 0x20     ;BOOT_CFG1[5]&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Ø  imxotp blow --force 6 0x10     ;BT_FUSE_SEL&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Peter&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 07 Mar 2013 15:12:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Pmic-on-Sabre-mcimx6q-sdb/m-p/251410#M23016</guid>
      <dc:creator>peter_pinewski</dc:creator>
      <dc:date>2013-03-07T15:12:52Z</dc:date>
    </item>
    <item>
      <title>Re: Pmic on Sabre mcimx6q-sdb</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Pmic-on-Sabre-mcimx6q-sdb/m-p/251411#M23017</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thank you.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 25 Mar 2013 10:16:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Pmic-on-Sabre-mcimx6q-sdb/m-p/251411#M23017</guid>
      <dc:creator>christophe</dc:creator>
      <dc:date>2013-03-25T10:16:50Z</dc:date>
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