<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>i.MX Processors中的主题 i.MX8M Mini Core0/Core1 Software Reset Issue - Core Hangs</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8M-Mini-Core0-Core1-Software-Reset-Issue-Core-Hangs/m-p/1973165#M229624</link>
    <description>&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I'm working with the i.MX8M Mini processor and trying to perform a software reset of Core0 and Core1. I have implemented the following approach where I set the reset vector using the SRC General Purpose Register (GPR) and then trigger a core reset using the A53 register. However, after resetting Core0 (or Core1), the core enters a hang state and doesn't resume properly.&lt;/P&gt;&lt;P&gt;Here’s a summary of what I did:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;Set Core0 Reset Vector: I wrote the high and low parts of the reset vector to the SRC_GPR1 and SRC_GPR2 registers.&lt;BR /&gt;&lt;BR /&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;UL&gt;&lt;LI&gt;Trigger Core0 Reset: I used the SRC_A53RCR0 register to trigger a software reset of Core0.&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;void trigger_core0_reset(void) {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; #define SRC_A53RCR0_ADDR 0x30390004&amp;nbsp;&amp;nbsp; // Address of SRC_A53RCR0&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; #define CORE0_RESET (1 &amp;lt;&amp;lt; 0)&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Bit 0 for Core0 software reset&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; volatile uint32_t *src_a53rcr0 = (uint32_t *)SRC_A53RCR0_ADDR;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; *src_a53rcr0 |= CORE0_RESET;&amp;nbsp; // Trigger Core0 software reset&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;I called the functions with:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;set_core0_reset_vector(0x7E1000);&amp;nbsp; // Example reset vector address&lt;/P&gt;&lt;P&gt;trigger_core0_reset();&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Issue: After resetting Core0, it appears to enter a hang state and does not recover. I also tried this approach for Core1 with the same result — the core hangs after the reset.&lt;/P&gt;&lt;P&gt;I would appreciate any help or insights into why the cores are hanging and what might be missing in my approach.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thank you in advance!&lt;/P&gt;</description>
    <pubDate>Mon, 14 Oct 2024 08:45:05 GMT</pubDate>
    <dc:creator>sirishaB</dc:creator>
    <dc:date>2024-10-14T08:45:05Z</dc:date>
    <item>
      <title>i.MX8M Mini Core0/Core1 Software Reset Issue - Core Hangs</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8M-Mini-Core0-Core1-Software-Reset-Issue-Core-Hangs/m-p/1973165#M229624</link>
      <description>&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I'm working with the i.MX8M Mini processor and trying to perform a software reset of Core0 and Core1. I have implemented the following approach where I set the reset vector using the SRC General Purpose Register (GPR) and then trigger a core reset using the A53 register. However, after resetting Core0 (or Core1), the core enters a hang state and doesn't resume properly.&lt;/P&gt;&lt;P&gt;Here’s a summary of what I did:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;Set Core0 Reset Vector: I wrote the high and low parts of the reset vector to the SRC_GPR1 and SRC_GPR2 registers.&lt;BR /&gt;&lt;BR /&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;UL&gt;&lt;LI&gt;Trigger Core0 Reset: I used the SRC_A53RCR0 register to trigger a software reset of Core0.&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;void trigger_core0_reset(void) {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; #define SRC_A53RCR0_ADDR 0x30390004&amp;nbsp;&amp;nbsp; // Address of SRC_A53RCR0&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; #define CORE0_RESET (1 &amp;lt;&amp;lt; 0)&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Bit 0 for Core0 software reset&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; volatile uint32_t *src_a53rcr0 = (uint32_t *)SRC_A53RCR0_ADDR;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; *src_a53rcr0 |= CORE0_RESET;&amp;nbsp; // Trigger Core0 software reset&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;I called the functions with:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;set_core0_reset_vector(0x7E1000);&amp;nbsp; // Example reset vector address&lt;/P&gt;&lt;P&gt;trigger_core0_reset();&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Issue: After resetting Core0, it appears to enter a hang state and does not recover. I also tried this approach for Core1 with the same result — the core hangs after the reset.&lt;/P&gt;&lt;P&gt;I would appreciate any help or insights into why the cores are hanging and what might be missing in my approach.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thank you in advance!&lt;/P&gt;</description>
      <pubDate>Mon, 14 Oct 2024 08:45:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8M-Mini-Core0-Core1-Software-Reset-Issue-Core-Hangs/m-p/1973165#M229624</guid>
      <dc:creator>sirishaB</dc:creator>
      <dc:date>2024-10-14T08:45:05Z</dc:date>
    </item>
  </channel>
</rss>

