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    <title>topic Re: i.MX8 booting from QSPIFlash in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1972705#M229586</link>
    <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;Customized board,&lt;/P&gt;</description>
    <pubDate>Sun, 13 Oct 2024 06:48:17 GMT</pubDate>
    <dc:creator>efio</dc:creator>
    <dc:date>2024-10-13T06:48:17Z</dc:date>
    <item>
      <title>i.MX8 booting from QSPIFlash</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1969057#M229417</link>
      <description>&lt;P&gt;Hi we've a imx8mn based board with different DDR chip and different NOR flash connected to QSPI interface. (different from imx8mn-evk board)&lt;BR /&gt;As well we have two boot options: eMMC and QSPI.&lt;BR /&gt;The board boots and works while booting from eMMC, the QSPI flash is available in u-boot and Linux.&lt;BR /&gt;But, when we're trying to switch to QSPI boot option - boot fails - no output on the console.&lt;BR /&gt;On the other hand, we can see the clocks on SPI bus and - it means the CPU indeed tries to boot from QSPI.&lt;BR /&gt;We're building our QSPI flash image with a help of imx-mkimage utility, there is a guide of how to create it:&lt;BR /&gt;&lt;A href="https://community.nxp.com/t5/i-MX-Processors/IMX8Mnano-EVK-How-to-make-QSPI-booting-image/td-p/1704730" target="_self"&gt;https://community.nxp.com/t5/i-MX-Processors/IMX8Mnano-EVK-How-to-make-QSPI-booting-image/td-p/1704730&lt;/A&gt;&lt;BR /&gt;In addition, here is the out of: make SOC=iMX8MN DEV=flexspi flash_evk&lt;/P&gt;&lt;DIV&gt;BL32=tee.bin DEK_BLOB_LOAD_ADDR=0x40400000 TEE_LOAD_ADDR=0x56000000 ATF_LOAD_ADDR=0x00960000 ../iMX8M/mkimage_fit_atf.sh evk.dtb&amp;nbsp; &amp;gt; u-boot.its&lt;/DIV&gt;&lt;DIV&gt;bl31.bin size:&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;41456&lt;/DIV&gt;&lt;DIV&gt;u-boot-nodtb.bin size:&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;736416&lt;/DIV&gt;&lt;DIV&gt;evk.dtb size:&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;28304&lt;/DIV&gt;&lt;DIV&gt;./mkimage_uboot -E -p 0x5000 -f u-boot.its u-boot.itb&lt;/DIV&gt;&lt;DIV&gt;FIT description: Configuration to load ATF before U-Boot&lt;/DIV&gt;&lt;DIV&gt;Created:&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;Tue Oct&amp;nbsp; 8 17:44:52 2024&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;Image 0 (uboot-1)&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; Description:&amp;nbsp; U-Boot (64-bit)&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; Created:&amp;nbsp; &amp;nbsp; &amp;nbsp; Tue Oct&amp;nbsp; 8 17:44:52 2024&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; Type:&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;Standalone Program&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; Compression:&amp;nbsp; uncompressed&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; Data Size:&amp;nbsp; &amp;nbsp; 736416 Bytes = 719.16 KiB = 0.70 MiB&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; Architecture: AArch64&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; Load Address: 0x40200000&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; Entry Point:&amp;nbsp; unavailable&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;Image 1 (fdt-1)&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; Description:&amp;nbsp; evk&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; Created:&amp;nbsp; &amp;nbsp; &amp;nbsp; Tue Oct&amp;nbsp; 8 17:44:52 2024&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; Type:&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;Flat Device Tree&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; Compression:&amp;nbsp; uncompressed&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; Data Size:&amp;nbsp; &amp;nbsp; 28304 Bytes = 27.64 KiB = 0.03 MiB&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; Architecture: Unknown Architecture&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;Image 2 (atf-1)&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; Description:&amp;nbsp; ARM Trusted Firmware&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; Created:&amp;nbsp; &amp;nbsp; &amp;nbsp; Tue Oct&amp;nbsp; 8 17:44:52 2024&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; Type:&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;Firmware&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; Compression:&amp;nbsp; uncompressed&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; Data Size:&amp;nbsp; &amp;nbsp; 41456 Bytes = 40.48 KiB = 0.04 MiB&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; Architecture: AArch64&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; OS:&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;Unknown OS&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; Load Address: 0x00960000&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;Default Configuration: 'config-1'&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;Configuration 0 (config-1)&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; Description:&amp;nbsp; evk&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; Kernel:&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;unavailable&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; Firmware:&amp;nbsp; &amp;nbsp; &amp;nbsp;uboot-1&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; FDT:&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; fdt-1&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; Loadables:&amp;nbsp; &amp;nbsp; atf-1&lt;/DIV&gt;&lt;DIV&gt;41420+1 records in&lt;/DIV&gt;&lt;DIV&gt;41421+0 records out&lt;/DIV&gt;&lt;DIV&gt;165684 bytes (166 kB, 162 KiB) copied, 0.0578868 s, 2.9 MB/s&lt;/DIV&gt;&lt;DIV&gt;./mkimage_imx8 -version v2 -fit -loader u-boot-spl-ddr.bin 0x912000 -second_loader u-boot.itb 0x40200000 0x60000 -out flash.bin&lt;/DIV&gt;&lt;DIV&gt;Platform: i.MX8M (mScale)&lt;/DIV&gt;&lt;DIV&gt;ROM VERSION: v2&lt;/DIV&gt;&lt;DIV&gt;Using FIT image&lt;/DIV&gt;&lt;DIV&gt;LOADER IMAGE: u-boot-spl-ddr.bin start addr: 0x00912000&lt;/DIV&gt;&lt;DIV&gt;SECOND LOADER IMAGE: u-boot.itb start addr: 0x40200000 offset: 0x00060000&lt;/DIV&gt;&lt;DIV&gt;Output: flash.bin&lt;/DIV&gt;&lt;DIV&gt;fit_size: 886&lt;/DIV&gt;&lt;DIV&gt;1+0 records in&lt;/DIV&gt;&lt;DIV&gt;1+0 records out&lt;/DIV&gt;&lt;DIV&gt;886 bytes copied, 5.7108e-05 s, 15.5 MB/s&lt;/DIV&gt;&lt;DIV&gt;FIT hash: 9dc0d453c9a49e3d880292c4c330e685ea495c6856ab82ab61354b134f9b&lt;/DIV&gt;&lt;DIV&gt;========= IVT HEADER [HDMI FW] =========&lt;/DIV&gt;&lt;DIV&gt;header.tag: 0x0&lt;/DIV&gt;&lt;DIV&gt;header.length: 0x0&lt;/DIV&gt;&lt;DIV&gt;header.version: 0x0&lt;/DIV&gt;&lt;DIV&gt;entry: 0x0&lt;/DIV&gt;&lt;DIV&gt;reserved1: 0x0&lt;/DIV&gt;&lt;DIV&gt;dcd_ptr: 0x0&lt;/DIV&gt;&lt;DIV&gt;boot_data_ptr: 0x0&lt;/DIV&gt;&lt;DIV&gt;self: 0x0&lt;/DIV&gt;&lt;DIV&gt;csf: 0x0&lt;/DIV&gt;&lt;DIV&gt;reserved2: 0x0&lt;/DIV&gt;&lt;DIV&gt;boot_data.start: 0x0&lt;/DIV&gt;&lt;DIV&gt;boot_data.size: 0x0&lt;/DIV&gt;&lt;DIV&gt;boot_data.plugin: 0x0&lt;/DIV&gt;&lt;DIV&gt;========= IVT HEADER [PLUGIN] =========&lt;/DIV&gt;&lt;DIV&gt;header.tag: 0x0&lt;/DIV&gt;&lt;DIV&gt;header.length: 0x0&lt;/DIV&gt;&lt;DIV&gt;header.version: 0x0&lt;/DIV&gt;&lt;DIV&gt;entry: 0x0&lt;/DIV&gt;&lt;DIV&gt;reserved1: 0x0&lt;/DIV&gt;&lt;DIV&gt;dcd_ptr: 0x0&lt;/DIV&gt;&lt;DIV&gt;boot_data_ptr: 0x0&lt;/DIV&gt;&lt;DIV&gt;self: 0x0&lt;/DIV&gt;&lt;DIV&gt;csf: 0x0&lt;/DIV&gt;&lt;DIV&gt;reserved2: 0x0&lt;/DIV&gt;&lt;DIV&gt;boot_data.start: 0x0&lt;/DIV&gt;&lt;DIV&gt;boot_data.size: 0x0&lt;/DIV&gt;&lt;DIV&gt;boot_data.plugin: 0x0&lt;/DIV&gt;&lt;DIV&gt;========= IVT HEADER [LOADER IMAGE] =========&lt;/DIV&gt;&lt;DIV&gt;header.tag: 0xd1&lt;/DIV&gt;&lt;DIV&gt;header.length: 0x2000&lt;/DIV&gt;&lt;DIV&gt;header.version: 0x41&lt;/DIV&gt;&lt;DIV&gt;entry: 0x912000&lt;/DIV&gt;&lt;DIV&gt;reserved1: 0x0&lt;/DIV&gt;&lt;DIV&gt;dcd_ptr: 0x0&lt;/DIV&gt;&lt;DIV&gt;boot_data_ptr: 0x911fe0&lt;/DIV&gt;&lt;DIV&gt;self: 0x911fc0&lt;/DIV&gt;&lt;DIV&gt;csf: 0x9527c0&lt;/DIV&gt;&lt;DIV&gt;reserved2: 0x0&lt;/DIV&gt;&lt;DIV&gt;boot_data.start: 0x911fc0&lt;/DIV&gt;&lt;DIV&gt;boot_data.size: 0x42860&lt;/DIV&gt;&lt;DIV&gt;boot_data.plugin: 0x0&lt;/DIV&gt;&lt;DIV&gt;========= OFFSET dump =========&lt;/DIV&gt;&lt;DIV&gt;Loader IMAGE:&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;header_image_off 0x0&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;dcd_off 0x0&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;image_off 0x40&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;csf_off 0x40800&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;spl hab block: 0x911fc0 0x0 0x40800&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Second Loader IMAGE:&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;sld_header_off 0x58000&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;sld_csf_off 0x59020&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;sld hab block: 0x401fadc0 0x58000 0x1020&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;fit-fdt csf_off 0x5b020&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;fit-fdt hab block: 0x401fadc0 0x58000 0x3020&lt;/DIV&gt;&lt;DIV&gt;SPL CSF block:&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;Blocks = 0x911fc0 0x0 0x40800 "flash.bin"&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;SLD CSF block:&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;Blocks = 0x401fadc0 0x58000 0x1020 "flash.bin",\&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;SLD FIT-FDT CSF block:&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;Blocks = 0x401fadc0 0x58000 0x3020 "flash.bin"&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;P&gt;&lt;SPAN&gt;bootmode selected:&amp;nbsp;FlexSPI - 3B Read '0110'&lt;BR /&gt;&lt;BR /&gt;We can see on power up clock signal of the QSPI bus.&lt;BR /&gt;But we can't see the processor running. Nothing over the console.&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;&lt;SPAN&gt;&amp;nbsp;What is probably incorrect in our FLASH image preparation?&lt;BR /&gt;&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;To which offset on QSPI FLASH the image should be burn?&lt;/LI&gt;&lt;LI&gt;Do we need to config something on u-boot? SPL? if so, what to config?&lt;/LI&gt;&lt;/OL&gt;&lt;DIV&gt;&lt;SPAN&gt;The flash P/N we are using is:&amp;nbsp;S25FL256SAGBHVB00&lt;BR /&gt;&lt;BR /&gt;Thank you so much for your help,&lt;BR /&gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;P&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 08 Oct 2024 15:15:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1969057#M229417</guid>
      <dc:creator>efio</dc:creator>
      <dc:date>2024-10-08T15:15:54Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8 booting from QSPIFlash</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1971130#M229494</link>
      <description>&lt;P&gt;Anyone?&lt;/P&gt;</description>
      <pubDate>Thu, 10 Oct 2024 07:47:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1971130#M229494</guid>
      <dc:creator>efio</dc:creator>
      <dc:date>2024-10-10T07:47:32Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8 booting from QSPIFlash</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1971194#M229496</link>
      <description>&lt;P&gt;HI&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/217169"&gt;@efio&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Did you choose the right boot selection? Please refer the following Boot selection for i.mx8MN.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="pengyong_zhang_0-1728549935338.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/303980iE7B8BBD7BF43DD19/image-size/medium?v=v2&amp;amp;px=400" role="button" title="pengyong_zhang_0-1728549935338.png" alt="pengyong_zhang_0-1728549935338.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;B.R&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 10 Oct 2024 08:47:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1971194#M229496</guid>
      <dc:creator>pengyong_zhang</dc:creator>
      <dc:date>2024-10-10T08:47:08Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8 booting from QSPIFlash</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1971199#M229497</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Yes I did,&lt;/P&gt;</description>
      <pubDate>Thu, 10 Oct 2024 08:49:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1971199#M229497</guid>
      <dc:creator>efio</dc:creator>
      <dc:date>2024-10-10T08:49:49Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8 booting from QSPIFlash</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1971212#M229498</link>
      <description>&lt;P&gt;hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/217169"&gt;@efio&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;I have test this on&amp;nbsp; my i.mx8mn evk board. And no issue found. Please share your uuu command result.&lt;/P&gt;
&lt;P&gt;"uuu -b qspi &amp;lt;.bin file&amp;gt;"&lt;/P&gt;
&lt;P&gt;B.R&lt;/P&gt;</description>
      <pubDate>Thu, 10 Oct 2024 09:02:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1971212#M229498</guid>
      <dc:creator>pengyong_zhang</dc:creator>
      <dc:date>2024-10-10T09:02:08Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8 booting from QSPIFlash</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1971293#M229504</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;Using uuu didn't work. I see that the flash is burned using sf read.&lt;BR /&gt;Is there any offset I should burn the bin file or it supposed to be in address 0x0?&lt;/P&gt;&lt;P&gt;Thank you&lt;/P&gt;</description>
      <pubDate>Thu, 10 Oct 2024 10:37:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1971293#M229504</guid>
      <dc:creator>efio</dc:creator>
      <dc:date>2024-10-10T10:37:04Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8 booting from QSPIFlash</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1971487#M229518</link>
      <description>&lt;P&gt;Does the&amp;nbsp;&lt;SPAN&gt;entry: 0x912000 correct for imx8mn?&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 10 Oct 2024 15:37:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1971487#M229518</guid>
      <dc:creator>efio</dc:creator>
      <dc:date>2024-10-10T15:37:30Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8 booting from QSPIFlash</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1971752#M229532</link>
      <description>&lt;P&gt;hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/217169"&gt;@efio&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;you are use our NXP i.MX8MN evk board or customer's board?&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 11 Oct 2024 02:04:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1971752#M229532</guid>
      <dc:creator>pengyong_zhang</dc:creator>
      <dc:date>2024-10-11T02:04:28Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8 booting from QSPIFlash</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1972695#M229579</link>
      <description>&lt;P class=""&gt;Hi,&lt;/P&gt;&lt;P class=""&gt;&amp;nbsp;&lt;/P&gt;&lt;P class=""&gt;Observations of QSPI controller:&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;Using an oscilloscope, I monitored the SPI wave and noticed the QSPI controller reading address 0x400 with command 0x3.&lt;/LI&gt;&lt;LI&gt;The read register value is 0xd1002041, which I believe should be correct.&lt;/LI&gt;&lt;LI&gt;The controller attempts this read twice.&lt;/LI&gt;&lt;LI&gt;A third read attempt is made using command 0x13 (4-byte address read), resulting in the same value: 0xd1002041.&lt;/LI&gt;&lt;LI&gt;After these three cycles, the operation halts.&lt;/LI&gt;&lt;/OL&gt;&lt;P class=""&gt;Questions:&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;Is this behavior normal for a QSPI controller?&lt;/LI&gt;&lt;LI&gt;Could the read value (0xd1002041) be incorrect despite appearing valid?&lt;/LI&gt;&lt;LI&gt;Why might the controller stop after three read attempts?&lt;/LI&gt;&lt;LI&gt;Is there a potential issue with the controller or the connected device?&lt;/LI&gt;&lt;/OL&gt;&lt;P class=""&gt;Any insights or suggestions for further troubleshooting would be greatly appreciated.&lt;BR /&gt;Thank you,&lt;/P&gt;</description>
      <pubDate>Sun, 13 Oct 2024 06:23:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1972695#M229579</guid>
      <dc:creator>efio</dc:creator>
      <dc:date>2024-10-13T06:23:29Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8 booting from QSPIFlash</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1972705#M229586</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;Customized board,&lt;/P&gt;</description>
      <pubDate>Sun, 13 Oct 2024 06:48:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1972705#M229586</guid>
      <dc:creator>efio</dc:creator>
      <dc:date>2024-10-13T06:48:17Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8 booting from QSPIFlash</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1972971#M229601</link>
      <description>&lt;P&gt;HI&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/217169"&gt;@efio&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Could you please share your board schematic file and your nor flash datasheet file?&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;B.R&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 14 Oct 2024 05:12:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1972971#M229601</guid>
      <dc:creator>pengyong_zhang</dc:creator>
      <dc:date>2024-10-14T05:12:57Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8 booting from QSPIFlash</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1973136#M229618</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;Yes of course, you can see below the schematics for both QSPI Flash and imx8mn.&lt;BR /&gt;Please note that I can see the signals over scope and I can communicate with the flash in uboot &amp;amp; linux (read, write and more). The issue occurs only when trying to boot from the QSPI flash.&lt;BR /&gt;The mux in the schematics meant for external flash burning - which also works.&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;As I wrote before about observations of the QSPI controller:&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;Using an &lt;STRONG&gt;oscilloscope&lt;/STRONG&gt;, I monitored the SPI wave and noticed the QSPI controller reading address 0x400 with command 0x3.&lt;/LI&gt;&lt;LI&gt;The read register value is 0xd1002041, which I believe should be correct.&lt;/LI&gt;&lt;LI&gt;The controller attempts this read twice.&lt;/LI&gt;&lt;LI&gt;A third read attempt is made using command 0x13 (4-byte address read), resulting in the same value: 0xd1002041.&lt;/LI&gt;&lt;LI&gt;After these three cycles, the operation halts.&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;Any suggestions?&lt;BR /&gt;&lt;BR /&gt;Thank you,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="QSPI Flash side" style="width: 946px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/304507i71E3A3A2C9E34FBD/image-size/large?v=v2&amp;amp;px=999" role="button" title="image.png" alt="QSPI Flash side" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;QSPI Flash side&lt;/span&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="imx8mn side" style="width: 666px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/304508iCDCAC3A211F2D477/image-size/large?v=v2&amp;amp;px=999" role="button" title="image.png" alt="imx8mn side" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;imx8mn side&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 14 Oct 2024 08:31:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1973136#M229618</guid>
      <dc:creator>efio</dc:creator>
      <dc:date>2024-10-14T08:31:22Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8 booting from QSPIFlash</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1973175#M229625</link>
      <description>&lt;P&gt;Flash data sheet:&lt;BR /&gt;&lt;A href="https://www.infineon.com/dgdl/Infineon-S25FL128SS25FL256S_128_Mb_(16_MB)256_Mb_(32_MB)_3.0V_SPI_Flash_Memory-DataSheet-v20_00-EN.pdf?fileId=8ac78c8c7d0d8da4017d0ecfb6a64a17" target="_self"&gt;S25FL256SAGBHVB00&lt;/A&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 14 Oct 2024 08:49:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1973175#M229625</guid>
      <dc:creator>efio</dc:creator>
      <dc:date>2024-10-14T08:49:59Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8 booting from QSPIFlash</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1973735#M229666</link>
      <description>&lt;P&gt;hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/217169"&gt;@efio&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;I have some confuse about your schematic, you connect on flash, why your schematic have two flash chips?&amp;nbsp; My understand is you only connect&amp;nbsp;&lt;A href="https://www.infineon.com/dgdl/Infineon-S25FL128SS25FL256S_128_Mb_(16_MB)256_Mb_(32_MB)_3.0V_SPI_Flash_Memory-DataSheet-v20_00-EN.pdf?fileId=8ac78c8c7d0d8da4017d0ecfb6a64a17" target="_blank" rel="nofollow noopener noreferrer"&gt;S25FL256SAGBHVB00&lt;/A&gt;&lt;SPAN&gt;&amp;nbsp;, right?&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;And what is your command to flash your .bin file to your flash?&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;B.R&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 15 Oct 2024 02:31:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1973735#M229666</guid>
      <dc:creator>pengyong_zhang</dc:creator>
      <dc:date>2024-10-15T02:31:22Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8 booting from QSPIFlash</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1974086#M229691</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;It's only one flash, the symbol package is divided to two for convenience.&lt;BR /&gt;I flashed the data using external J-Link and using dd command of linux.&lt;BR /&gt;both gave some results.&lt;/P&gt;&lt;P&gt;Hexdump gives the correct data.&lt;BR /&gt;&lt;BR /&gt;I don't think the data is the issue, something is wrong what the IVT header the QSPI controller reads.&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;========= IVT HEADER [LOADER IMAGE] =========&lt;BR /&gt;header.tag: &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;0xd1&lt;BR /&gt;header.length: &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;0x2000&lt;BR /&gt;header.version: &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;0x41&lt;BR /&gt;&lt;BR /&gt;&lt;/SPAN&gt;Thank you,&lt;/P&gt;</description>
      <pubDate>Tue, 15 Oct 2024 08:57:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1974086#M229691</guid>
      <dc:creator>efio</dc:creator>
      <dc:date>2024-10-15T08:57:19Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8 booting from QSPIFlash</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1975605#M229768</link>
      <description>&lt;P&gt;hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/217169"&gt;@efio&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;What is your result when you use the UUU command flash your .bin file?&lt;/P&gt;
&lt;P&gt;B.R&lt;/P&gt;</description>
      <pubDate>Thu, 17 Oct 2024 01:51:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1975605#M229768</guid>
      <dc:creator>pengyong_zhang</dc:creator>
      <dc:date>2024-10-17T01:51:37Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8 booting from QSPIFlash</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1976334#M229816</link>
      <description>Same, doesn't work</description>
      <pubDate>Thu, 17 Oct 2024 18:38:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1976334#M229816</guid>
      <dc:creator>efio</dc:creator>
      <dc:date>2024-10-17T18:38:52Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8 booting from QSPIFlash</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1976749#M229832</link>
      <description>&lt;P&gt;HI&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/217169"&gt;@efio&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;I found the same issue with you, You can refer it follow the below link. hope it can help you.&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.nxp.com/t5/i-MX-Processors/i-MX8MM-QSPI-booting-and-partition/m-p/1661476" target="_blank"&gt;https://community.nxp.com/t5/i-MX-Processors/i-MX8MM-QSPI-booting-and-partition/m-p/1661476&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;B.R&lt;/P&gt;</description>
      <pubDate>Fri, 18 Oct 2024 06:52:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1976749#M229832</guid>
      <dc:creator>pengyong_zhang</dc:creator>
      <dc:date>2024-10-18T06:52:05Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8 booting from QSPIFlash</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1978872#M229964</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;Unfortunately, the link doesn't help - I want to boot the imx8mn from the QSPI flash - meaning u-boot should come-up from the QSPI flash.&lt;/P&gt;&lt;P&gt;Any other suggestions?&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Thank you very much,&lt;/P&gt;</description>
      <pubDate>Tue, 22 Oct 2024 06:50:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1978872#M229964</guid>
      <dc:creator>efio</dc:creator>
      <dc:date>2024-10-22T06:50:11Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8 booting from QSPIFlash</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1979625#M230013</link>
      <description>&lt;P&gt;HI&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/217169"&gt;@efio&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Please use the following command compile your flash.bin file.&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;make SOC=iMX8MN flash_evk_flexspi&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;B.R&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 23 Oct 2024 01:52:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8-booting-from-QSPIFlash/m-p/1979625#M230013</guid>
      <dc:creator>pengyong_zhang</dc:creator>
      <dc:date>2024-10-23T01:52:27Z</dc:date>
    </item>
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